; Disassembly of the file "BIOS.bin" ; ; CPU Type: Z80 ; ; Created with dZ80 2.0 ; ; on Saturday, 13 of July 2013 at 06:21 PM ; DF00 C385E1 JP $E185 ; BOOT (00 - Cold Start) DF03 C390E1 JP $E190 ; WBOOT (01 - Warm Boot) DF06 C333E0 JP $E033 ; CONST (02 - Check for Console Char Ready) DF09 C388E0 JP $E088 ; CONIN (03 - Read Console Char In) DF0C C397E0 JP $E097 ; CONOUT (04 - Write Console Char Out) DF0F C383E9 JP $E983 ; LIST (05 - Write Listing Char Out) DF12 C38EE9 JP $E98E ; PUNCH (06 - Write Char to Punch dev) DF15 C3D0E9 JP $E9D0 ; READER (07 - Read Reader dev) DF18 C3EBE0 JP $E0EB ; HOME (08 - Go to Track 00 on selected drive) DF1B C3A7E0 JP $E0A7 ; SELDSK (09 - Select Disk Drive) DF1E C3EDE0 JP $E0ED ; SETTRK (0A - Set Track Number) DF21 C3F2E0 JP $E0F2 ; SETSEC (0B - Set Sector Number) DF24 C3F8E0 JP $E0F8 ; SETDMA (0C - Set DMA Address) DF27 C340E1 JP $E140 ; READ (0D - Read Selected Sector) DF2A C346E1 JP $E146 ; WRITE (0E - Write Selected Sector) DF2D C374E9 JP $E974 ; LISTST (0F - Return LST dev Status DF30 C3FDE0 JP $E0FD ; SECTRAN(10 - Sector Translation) DF33 C32CE1 JP $E12C ; UNK #1 DF36 C330E1 JP $E130 ; UNK #2 DF39 C3D2E2 JP $E2D2 ; UNK #3 DF3C C350EA JP $EA50 ; UNK #4 DF3F 1E DEFB $1E DF40 40 DEFB $40 ; 8255/Port C mirror (initial value with O6=1 -> VRAM CPU access) DF41 40 DEFB $40 DF42 00 DEFB $00 DF43 07 DEFB $07 DF44 00 DEFB $00 DF45 00 DEFB $00 ; \ DF46 7B DEFB $7B ; /base of character generator in VRAM DF47 11 DEFB $11 DF48 08 DEFB $08 DF49 01 DEFB $01 DF4A FF DEFB $FF DF4B 17 DEFB $17 DF4C 00 DEFB $00 DF4D 05 DEFB $05 DF4E 0D DEFB $0D DF4F 06 DEFB $06 DF50 00 DEFB $00 DF51 02 DEFB $02 ; (DF51) physical drv# DF52 02 DEFB $02 ; (DF52) track# DF53 00 DEFB $00 ; (DF53) head# DF54 01 DEFB $01 ; (DF54) physical sector# + 1 DF55 01 DEFB $01 ; (DF55) logical sector# DF56 60 DEFB $60 DF57 80 DEFB $80 ; \ DMA addr for subsequent DF58 00 DEFB $00 ; / read/write operations DF59 CA DEFB $CA ; \ addr of DF5A DF DEFB $DF ; / DPB #2-#7 DF5B FF DEFB $FF DF5C 00 DEFB $00 ; (DF5C) crt. logical drv# DF5D 00 DEFB $00 ; (DF5D) current drive (?) DF5E 04 DEFB $04 ; (DF5E) max. logical drv# DF5F 04 DEFB $04 ; (DF5F) backup of max. logical drv# DF60 02 DEFB $02 DF61 0A DEFB $0A DF62 20 DEFB $20 DF63 FF DEFB $FF DF64 EF DEFB $EF DF65 3F DEFB $3F DF66 77 DEFB $77 DF67 DF DEFB $DF DF68 50 DEFB $50 DF69 00 DEFB $00 DF6A 04 DEFB $04 DF6B 0F DEFB $0F DF6C 00 DEFB $00 DF6D 8F DEFB $8F DF6E 01 DEFB $01 DF6F FF DEFB $FF DF70 00 DEFB $00 DF71 F0 DEFB $F0 DF72 00 DEFB $00 DF73 20 DEFB $20 DF74 00 DEFB $00 DF75 00 DEFB $00 DF76 00 DEFB $00 DF77 00 DEFB $00 ; (DF77) ##### XLT #5 ##### (10 sec/trk, skew=3) DF78 03 DEFB $03 DF79 06 DEFB $06 DF7A 09 DEFB $09 DF7B 02 DEFB $02 DF7C 05 DEFB $05 DF7D 08 DEFB $08 DF7E 01 DEFB $01 DF7F 04 DEFB $04 DF80 07 DEFB $07 DF81 02 DEFB $02 DF82 09 DEFB $09 DF83 20 DEFB $20 DF84 FF DEFB $FF DF85 EF DEFB $EF DF86 3F DEFB $3F DF87 98 DEFB $98 DF88 DF DEFB $DF DF89 24 DEFB $24 DF8A 00 DEFB $00 DF8B 03 DEFB $03 DF8C 07 DEFB $07 DF8D 00 DEFB $00 DF8E AA DEFB $AA DF8F 00 DEFB $00 DF90 3F DEFB $3F DF91 00 DEFB $00 DF92 C0 DEFB $C0 DF93 00 DEFB $00 DF94 10 DEFB $10 DF95 00 DEFB $00 DF96 02 DEFB $02 DF97 00 DEFB $00 DF98 00 DEFB $00 ; (DF98) ##### XLT #6 ##### (9 sec/trk, skew=4) DF99 04 DEFB $04 DF9A 08 DEFB $08 DF9B 03 DEFB $03 DF9C 07 DEFB $07 DF9D 02 DEFB $02 DF9E 06 DEFB $06 DF9F 01 DEFB $01 DFA0 05 DEFB $05 DFA1 00 DEFB $00 DFA2 00 DEFB $00 DFA3 00 DEFB $00 DFA4 00 DEFB $00 DFA5 00 DEFB $00 DFA6 00 DEFB $00 DFA7 00 DEFB $00 DFA8 00 DEFB $00 DFA9 00 DEFB $00 DFAA 00 DEFB $00 DFAB 00 DEFB $00 DFAC 00 DEFB $00 DFAD 00 DEFB $00 DFAE 00 DEFB $00 DFAF 00 DEFB $00 DFB0 00 DEFB $00 DFB1 00 DEFB $00 DFB2 00 DEFB $00 DFB3 00 DEFB $00 DFB4 00 DEFB $00 DFB5 00 DEFB $00 DFB6 00 DEFB $00 DFB7 00 DEFB $00 DFB8 00 DEFB $00 ; (DFB8) ##### XLT #7 ##### (10 sec/trk?, undefined) DFB9 00 DEFB $00 DFBA 00 DEFB $00 DFBB 00 DEFB $00 DFBC 00 DEFB $00 DFBD 00 DEFB $00 DFBE 00 DEFB $00 DFBF 00 DEFB $00 DFC0 00 DEFB $00 DFC1 00 DEFB $00 ; ##### 8272 command args for $5C90 routine DFC2 02 DEFB $02 ; N DFC3 09 DEFB $09 ; EOT DFC4 20 DEFB $20 ; GPL DFC5 FF DEFB $FF ; DTL DFC6 EF DEFB $EF ; arg #1 for Specify (SRT+HUT) DFC7 3F DEFB $3F ; arg #2 for Specify (HLT+ND) DFC8 D9 DEFB $D9 DFC9 DF DEFB $DF ; (DFCA) ######## DPB #2-#7 ######## DFCA 48 DEFB $48 ; \ DFCB 00 DEFB $00 ; /SPT = 0048 (128-byte Sectors Per Track counting both sides = 72) DFCC 04 DEFB $04 ; BSH = 04 \these values give DFCD 0F DEFB $0F ; BLM = 0F /a block size of 2K DFCE 00 DEFB $00 ; EXM = 00 DFCF 5E DEFB $5E ; \ DFD0 01 DEFB $01 ; /DSM = 015E DFD1 7F DEFB $7F ; \ DFD2 00 DEFB $00 ; /DRM = 007F DFD3 C0 DEFB $C0 ; AL0 = C0 DFD4 00 DEFB $00 ; AL1 = 00 DFD5 20 DEFB $20 ; \ DFD6 00 DEFB $00 ; /CKS = 0020 DFD7 02 DEFB $02 ; \ DFD8 00 DEFB $00 ; /OFF = 0002 DFD9 00 DEFB $00 ; (DFD9) ##### XLT #2-#4 ##### (9 sec/trk, skew=2) DFDA 02 DEFB $02 DFDB 04 DEFB $04 DFDC 06 DEFB $06 DFDD 08 DEFB $08 DFDE 01 DEFB $01 DFDF 03 DEFB $03 DFE0 05 DEFB $05 DFE1 07 DEFB $07 DFE2 00 DEFB $00 DFE3 1A DEFB $1A DFE4 07 DEFB $07 DFE5 80 DEFB $80 DFE6 BF DEFB $BF DFE7 17 DEFB $17 DFE8 F9 DEFB $F9 DFE9 DF DEFB $DF ; (DFEA) ######## DPB #0-#1 ######## DFEA 1A DEFB $1A ; \ DFEB 00 DEFB $00 ; /SPT = 001A (128-byte Sectors Per Track counting both sides = 26) DFEC 03 DEFB $03 ; BSH = 03 DFED 07 DEFB $07 ; BLM = 07 DFEE 00 DEFB $00 ; EXM = 00 DFEF F2 DEFB $F2 ; \ DFF0 00 DEFB $00 ; /DSM = 00F2 DFF1 3F DEFB $3F ; \ DFF2 00 DEFB $00 ; /DRM = 003F DFF3 C0 DEFB $C0 ; AL0 = C0 DFF4 00 DEFB $00 ; AL1 = 00 DFF5 10 DEFB $10 ; \ DFF6 00 DEFB $00 ; /CKS = 0010 DFF7 02 DEFB $02 ; \ DFF8 00 DEFB $00 ; /OFF = 0002 DFF9 00 DEFB $00 ; (DFF9) ###### XLT #0-#1 ###### (26 sec/trk, skew=6) DFFA 06 DEFB $06 DFFB 0C DEFB $0C DFFC 12 DEFB $12 DFFD 18 DEFB $18 DFFE 04 DEFB $04 DFFF 0A DEFB $0A E000 10 DEFB $10 E001 16 DEFB $16 E002 02 DEFB $02 E003 08 DEFB $08 E004 0E DEFB $0E E005 14 DEFB $14 E006 01 DEFB $01 E007 07 DEFB $07 E008 0D DEFB $0D E009 13 DEFB $13 E00A 19 DEFB $19 E00B 05 DEFB $05 E00C 0B DEFB $0B E00D 11 DEFB $11 E00E 17 DEFB $17 E00F 03 DEFB $03 E010 09 DEFB $09 E011 0F DEFB $0F E012 15 DEFB $15 E013 8B DEFB $8B E014 EA DEFB $EA E015 8B DEFB $8B E016 EA DEFB $EA E017 00 DEFB $00 E018 00 DEFB $00 E019 00 DEFB $00 E01A 00 DEFB $00 E01B 8B DEFB $8B E01C EA DEFB $EA E01D 8B DEFB $8B E01E EA DEFB $EA E01F 00 DEFB $00 E020 00 DEFB $00 E021 00 DEFB $00 E022 00 DEFB $00 E023 00 DEFB $00 E024 00 DEFB $00 ; char to be written to TTY E025 C0 DEFB $C0 E026 08 DEFB $08 E027 10 DEFB $10 E028 00 DEFB $00 E029 E6 DEFB $E6 E02A FD DEFB $FD E02B 00 DEFB $00 E02C 7E DEFB $7E E02D 00 DEFB $00 E02E 00 DEFB $00 E02F 00 DEFB $00 E030 00 DEFB $00 E031 00 DEFB $00 E032 00 DEFB $00 E033 3A0300 LD A,($0003) ; ################### CONST (E033) #################### E036 E602 AND $02 E038 C2D9E9 JP NZ,$E9D9 E03B 3A4CDF LD A,($DF4C) E03E B7 OR A E03F C8 RET Z E040 214EDF LD HL,$DF4E E043 CB7E BIT 7,(HL) E045 C8 RET Z E046 7E LD A,(HL) E047 2150DF LD HL,$DF50 E04A FE82 CP $82 E04C 2816 JR Z,$E064 E04E FE90 CP $90 E050 2825 JR Z,$E077 E052 FE91 CP $91 E054 2825 JR Z,$E07B E056 FEFE CP $FE E058 CA85E1 JP Z,$E185 E05B AF XOR A E05C 324CDF LD ($DF4C),A E05F C9 RET E060 AE XOR (HL) E061 77 LD (HL),A E062 18F7 JR $E05B E064 3E04 LD A,$04 E066 AE XOR (HL) E067 77 LD (HL),A E068 E604 AND $04 E06A 210801 LD HL,$0108 E06D 2803 JR Z,$E072 E06F 210204 LD HL,$0402 E072 2248DF LD ($DF48),HL E075 18E4 JR $E05B E077 3E40 LD A,$40 E079 18E5 JR $E060 E07B 2147DF LD HL,$DF47 E07E 3E02 LD A,$02 E080 AE XOR (HL) E081 77 LD (HL),A E082 324EDF LD ($DF4E),A E085 F6FF OR $FF E087 C9 RET E088 3A0300 LD A,($0003) ; ################### CONIN (E088) #################### E08B CB4F BIT 1,A E08D CA34E1 JP Z,$E134 E090 0F RRCA E091 D215DF JP NC,$DF15 E094 C3D0E9 JP $E9D0 E097 47 LD B,A ; ################### CONOUT (E097) #################### E098 3A0300 LD A,($0003) ; IOBYTE E09B CB4F BIT 1,A ; test CONSOLE bit 1 (if CONSOLE=BAT: or UC1:) E09D CA3AE1 JP Z,$E13A ; if CONSOLE=TTY: or CRT: then jump E0A0 0F RRCA ; test bit 0 in CY E0A1 D28EE9 JP NC,$E98E ; if CONSOLE=BAT: then jump E0A4 C312DF JP $DF12 ; if CONSOLE=UC1: then jump ; ################### SELDSK (E0A7) #################### ; inputs: C = logical drive no. to be selected ; outputs: DE = DPB base addr of the logical/physical drv# selected or 0004 if nonexistent drive selected ; HL = DPH base address or 0000 if nonexistent drive selected ; results: (DF5C) = logical drive no. to be selected ; (DF5E) = 04 if A:-D: to be sel, or 03 if E:-H: to be sel (max. logical drv#) ; (DF51) = physical drv# to be selected according to table at FC00 E0A7 210400 LD HL,$0004 ; address of DSK byte (crt. physical drv# in bits 0-3, crt. user# in bits 4-7) E0AA 46 LD B,(HL) ; save DSK byte in register B E0AB AF XOR A E0AC 77 LD (HL),A ; set DSK byte to 00 (set default logical drive to A) ================== NEEDS CHANGE ================== (NOP at E0AC) E0AD EB EX DE,HL ; save HL in DE E0AE 67 LD H,A ; E0AF 6F LD L,A ; set HL=0000 (error result) E0B0 3A5EDF LD A,($DF5E) ; max. logical drive number E0B3 B9 CP C ; C contains the logical drv# to be selected (0=A: 1=B: ...) E0B4 D8 RET C ; return with error if drive number given bigger than max. drive number ; (return with DSK Byte=00 and HL=0000 meaning error selecting disk) E0B5 EB EX DE,HL ; restore initial value of HL (0004) E0B6 70 LD (HL),B ; restore initial value of DSK byte E0B7 79 LD A,C ; A=logical drv# to be selected E0B8 325CDF LD ($DF5C),A ; (DF5C) = crt. logical drv# E0BB 215FDF LD HL,$DF5F ; (DF5F)=$04 (backup of max. logical drv#) E0BE 46 LD B,(HL) ; B=$04 E0BF 2B DEC HL ; HL=DF5E -> addr of max. logical drv# E0C0 3603 LD (HL),$03 ; set max. logical drv# (DF5E) to 3 (D:) E0C2 CB57 BIT 2,A ; test bit 2 of logical drv# to be selected E0C4 2001 JR NZ,$E0C7 ; if 1 (logical drive E:-H:) skip next line --->| E0C6 70 LD (HL),B ; set max. logical drv# (DF5E) to backup value | ; max. logical drv#=04 if A:-D: to be sel, or 03 if E:-H: to be sel E0C7 2100FC LD HL,$FC00 ; addr of physical drv# for A: <--- <--- <--- <-| E0CA B5 OR L ; A+L=A (L=00) ---> this is just for resetting the Carry flag E0CB 6F LD L,A ; HL now points to physical drv# of the logical drive selected E0CC 7E LD A,(HL) ; *** A = physical drv# to be selected E0CD 3251DF LD ($DF51),A ; physical drv# currently selected E0D0 CB51 BIT 2,C ; test bit 2 of logical drv# to be selected E0D2 2801 JR Z,$E0D5 ; if 0 (logical drive A:-D:) skip next line --->| E0D4 79 LD A,C ; *** A = logical drv# to be selected | ; *** A = physical drv# if A:-D:, logical drv# if E:-H: E0D5 1100FB LD DE,$FB00 ; FB00 = start addr of DPH areas (DPBASE) <-----| E0D8 07 RLCA ; CY flag previously reset to 0 E0D9 07 RLCA ; E0DA 07 RLCA ; E0DB 07 RLCA ; A shifted 4 bits left (DPH length is 16 bytes) so A = x0, where x = logical/physical drv# E0DC B3 OR E ; does nothing, E=00 E0DD 5F LD E,A ; DE = DPH base addr for logical/physical drv# selected E0DE F60A OR $0A ; A = A + 0Ah = xAh, where x = logical/physical drv# on 4 bits E0E0 6F LD L,A E0E1 62 LD H,D ; HL = FBxA where x = drv# (HL points to the DPB of DPH number x in the DPH table) E0E2 7E LD A,(HL) ; A = DPB lower byte E0E3 23 INC HL ; HL points to upper byte of DPB E0E4 66 LD H,(HL) ; H = DPB upper byte E0E5 6F LD L,A ; L = DPB lower byte, so HL = DPB address of the DPH number x E0E6 2259DF LD ($DF59),HL ; (DF59) = DPB address of the DPH number x E0E9 EB EX DE,HL ; HL = DPH base addr for logical/physical drv# selected, DE = DPB base addr of the logical/physical drv# selected E0EA C9 RET E0EB 0E00 LD C,$00 ; ################### HOME (E0EB) #################### E0ED 2152DF LD HL,$DF52 ; ################### SETTRK (E0ED) #################### E0F0 71 LD (HL),C E0F1 C9 RET ; ################### SETSEC (E0F2) #################### ; inputs: C = physical sector# ; stores physical sector# +1 at (DF54) E0F2 0C INC C E0F3 2154DF LD HL,$DF54 E0F6 71 LD (HL),C E0F7 C9 RET ; ################### SETDMA (E0F8) #################### ; inputs: BC = DMA addr for subsequent read/write operations E0F8 ED4357DF LD ($DF57),BC ; store DMA addr to ($DF57) E0FC C9 RET ; ################### SECTRAN (E0FD) #################### ; inputs: C = logical sector# (LSN) (128-byte Sectors Per Track counting both sides) ; DE = XLT table address ; outputs: HL = physical sector# ; ($DF53) = head# E0FD 79 LD A,C ; A = LSN E0FE 3255DF LD ($DF55),A ; store logical sector# at (DF55) E101 2A59DF LD HL,($DF59) ; (DF59) = DPB address of the current drive E104 4E LD C,(HL) ; C = the Sector/Track (SPT) value from DPB (128-byte Sectors Per Track counting both sides) E105 2153DF LD HL,$DF53 ; head# addr E108 3600 LD (HL),$00 ; set head# to 0 E10A CB71 BIT 6,C ; test bit 6 of SPT (SPT < or > $40=64) E10C 2808 JR Z,$E116 ; if zero ---> ---> ---> --->| (if < 64) E10E CB39 SRL C ; divide SPT by 2 | ($48/2=$24) E110 B9 CP C ; compare LSN w/ SPT | E111 3803 JR C,$E116 ; if LSN < SPT ---> ---> --->| (if LSN is on side 0) E113 91 SUB C ; A=LSN-SPT | E114 3601 LD (HL),$01 ; set head# to 1 | E116 6F LD L,A ; <--- <--- <--- <--- <--- <-| L = LSN E117 2600 LD H,$00 ; HL=logical sector# ############################# E119 3A51DF LD A,($DF51) ; A = crt. physical drive# \ -> LD A,($DF59) *crt DPB addr # MODIFICATION FOR A: AND B: E11C E602 AND $02 ; test if drive 2 or 3 / -> CP $EA *test if DPB #0-#1 # TO BE DSDD 720K DRIVES E11E 2804 JR Z,$E124 ; if not ---> ---> ---> ---->| ############################# E120 CB3D SRL L ; | E122 CB3D SRL L ; divide LSN by 4 | HL = LSN / 4 E124 7A LD A,D ; <--- <--- <--- <--- <--- <-| E125 B3 OR E ; test if DE=0000 E126 C8 RET Z ; return if XLT table address given is 0000 E127 19 ADD HL,DE ; add logical sector# to XLT base address E128 6E LD L,(HL) ; read physical sector# in L E129 2600 LD H,$00 ; HL=physical sector# E12B C9 RET E12C 2198FD LD HL,$FD98 ; ################### UNK #1 (E12C) #################### E12F C9 RET E130 2145DF LD HL,$DF45 ; ################### UNK #2 (E130) #################### E133 C9 RET E134 CD4CE1 CALL $E14C E137 C3DEE2 JP $E2DE E13A CD4CE1 CALL $E14C ; CONOUT if CONSOLE=TTY:/CRT: E13D C3F0E2 JP $E2F0 ; ################### READ (E140) #################### E140 CD4CE1 CALL $E14C ; call READ/WRITE PRECONFIG E143 C3145B JP $5B14 ; ################### WRITE (E146) #################### E146 CD4CE1 CALL $E14C ; call READ/WRITE PRECONFIG E149 C3105B JP $5B10 E14C F3 DI ; ############### READ/WRITE PRECONFIG ################ E14D E1 POP HL E14E 3A40DF LD A,($DF40); A = 8255/Port C mirror byte E151 CB77 BIT 6,A ; O6, CP/M DRAM1/VRAM access bit E153 2015 JR NZ,$E16A ; if VRAM access skip to end ---> ---> ---> ---> ---> --->| E155 3242DF LD ($DF42),A ; copy to ($DF42) (backup) | E158 F660 OR $60 ; set O5, O6 (VRAM page 2 access) | E15A 3240DF LD ($DF40),A ; save to ($DF40) | E15D D3FE OUT ($FE),A ; send to port C | E15F ED73EEFD LD ($FDEE),SP ; save SP to ($FDEE-FDEF) *** see line E17F below | E163 31EEFD LD SP,$FDEE ; set stack at FDEE | E166 116CE1 LD DE,$E16C ; | E169 D5 PUSH DE ; save E16C on stack (return addr to next code below) | E16A FB EI ; <--- <--- <--- <--- <--- <--- <--- <--- <--- <--- <---| E16B E9 JP (HL) ; HL = E149 so will jump to $5B10 for the actual WRITE routine ; and when WRITE ends will "return" to code below E16C F3 DI ; ############### READ/WRITE POSTCONFIG ################ E16D 47 LD B,A ; backup A in B E16E EB EX DE,HL ; backup HL in DE E16F 3E40 LD A,$40 ; bit 6 = 1 E171 2142DF LD HL,$DF42 ; E174 A6 AND (HL) ; A = mask of bit 6 in ($DF42) E175 2B DEC HL E176 2B DEC HL ; HL = $DF40, addr of 8255/Port C mirror byte E177 CBB6 RES 6,(HL) ; reset bit 6 in ($DF40) (for DRAM1 access) E179 B6 OR (HL) E17A 77 LD (HL),A ; if bit 6 in ($DF42) is 1, set it also in ($DF40) E17B D3FE OUT ($FE),A ; send to 8255 E17D EB EX DE,HL ; restore HL from DE E17E 78 LD A,B ; restore A from B E17F ED7BEEFD LD SP,($FDEE) ; restore original SP *** E183 FB EI E184 C9 RET E185 F3 DI ; ################### BOOT (E185) #################### E186 210000 LD HL,$0000 E189 3EC1 LD A,$C1 ; value for 8255 port A E18B D3FE OUT ($FE),A ; set SO=1, O6=1, border=blue E18D ED4F LD R,A ; set bit 7 of R to 1 (change to startup config) E18F E9 JP (HL) ; jump to beginning of BOOT ROM E190 F3 DI ; ################### WBOOT (E190) #################### E191 3A40DF LD A,($DF40) E194 F6C0 OR $C0 ; set bit 6,7 E196 D3FE OUT ($FE),A ; set SO=1, O6=1 (VRAM CPU access) E198 310001 LD SP,$0100 ; set stack to 0100 E19B 3EC3 LD A,$C3 ; opcode for JP... E19D 320000 LD ($0000),A ; ... stored at 0000 E1A0 2103DF LD HL,$DF03 ; BIOS WBOOT entry point address ... E1A3 220100 LD ($0001),HL ; ... stored at 0001+0002 E1A6 320500 LD ($0005),A ; opcode for JP stored at 0005 E1A9 2106D1 LD HL,$D106 ; BDOS entry point ... E1AC 220600 LD ($0006),HL ; ... stored at 0006+0007 E1AF 2190FD LD HL,$FD90 ; \ copy 8 bytes E1B2 1198FD LD DE,$FD98 ; | from FD90 E1B5 010800 LD BC,$0008 ; | to FD98 E1B8 EDB0 LDIR ; / (restore Z80-CTC interrupt table) E1BA ED5E IM 2 E1BC 7C LD A,H ; upper half of CTC interrupt table start address (FD)... E1BD ED47 LD I,A ; ...is stored in register I (see Z80 docs) E1BF 7D LD A,L ; lower half of CTC interrupt table start address (98)... E1C0 D3E3 OUT ($E3),A ; ... is sent to CTC channel 0 ; MEANING: Interrupt Vector being used by all 4 channels!! ; Interrupt Vector = 10011cc0 where cc is the CTC channel. ; requesting the interrupt. So vector for CTC0 = FD98, CTC1 = FD9A, CTC2 = FD9C, CTC3 = FD9E ; The upper half of addr table pointer is FD. E1C2 3EFF LD A,$FF ; data for CTC0 on next line: set CTC0 to counter mode and enable CTC0 interrupts E1C4 D3E3 OUT ($E3),A ; write FF to CTC channel 0 (Enable Interrupt, Counter Mode, ; Rising Edge, Time Const. Follows, Reset, Control). ; MEANING: Reset, Enable Interrupts for Channel 0, a Time Constant follows. E1C6 3E01 LD A,$01 ; time constant for CTC0 on next line: generate INT for each byte transferred from 8272 to µP E1C8 D3E3 OUT ($E3),A ; write 01 to CTC channel 0 ; MEANING: Time Constant byte (=01, for 1 byte read). E1CA 3E7B LD A,$7B ; data for CTC1 on next line: disable int, Counter Mode, rising edge, ; No Time Const. Follows, Software Reset E1CC D3EB OUT ($EB),A ; write 7B to CTC channel 1 (disable interrupt) E1CE D3F3 OUT ($F3),A ; write 7B to CTC channel 2 (disable interrupt) E1D0 3EFF LD A,$FF ; data for CTC3 on next line: set CTC3 to counter mode and enable CTC3 interrupts E1D2 D3FB OUT ($FB),A ; write FF to CTC channel 3 (Enable Interrupt, Counter Mode, ; Rising Edge, Time Const. Follows, Reset, Control). ; MEANING: Reset, Enable Interrupts for Channel 3, a Time Constant follows. E1D4 3E01 LD A,$01 ; time constant for CTC3 on next line E1D6 D3FB OUT ($FB),A E1D8 FB EI E1D9 18FE JR $E1D9 ; here execution loops until the next TRG3 interrupt occurs. ; This is the standard 20 ms Spectrum interrupt but prioritized ; through Z80-CTC Channel 3. When the first interrupt occurs ; at this point, the CTC3 interrupt vector is set to FD9E (see line 02C0 above). ; At this location (FD9E-FD9F) we find the value E1DB which was ; previously copied from (FD96-FD97), see lines 02AF-02B8 above. ; So when the first TRG3 interrupt occurs, the interrupt routine that ; will be executed is the one listed right below (BACKUP CTC3 INT. ROUTINE) ; and at the end of it execution returns not to the end of WBOOT but to the start of CCP. ; This routine contains instructions to change the CTC3 int. routine with E224, ; which is the MAIN CTC3 INT. ROUTINE listed right after the BACKUP CTC3 INT. ROUTINE below. ; So for only the first TRG3 interrupt occuring at this point, BACKUP CTC3 INT. ROUTINE ; will be executed, and for all subsequent interrupts the MAIN CTC3 INT. ROUTINE will be executed. ; ######## BACKUP CTC3 INT. ROUTINE (E1DB) ######### E1DB CD745C CALL $5C74 ; read 8272 result buffer until empty E1DE CDB65C CALL $5CB6 ; send a Sense Int. Status command E1E1 2124E2 LD HL,$E224 E1E4 229EFD LD ($FD9E),HL ; change CTC3 int. routine to E224 (MAIN CTC3 INT. ROUTINE) E1E7 21FFFF LD HL,$FFFF E1EA 220AFC LD ($FC0A),HL ; set (FC0A) and (FC0B) to FF E1ED 3E04 LD A,$04 E1EF 32085B LD ($5B08),A ; 108h in sec1/cyl01/side1 E1F2 AF XOR A E1F3 32075B LD ($5B07),A ; 107h in sec1/cyl01/side1 E1F6 1100C9 LD DE,$C900 ; @@@ save CCP start address on stack E1F9 D5 PUSH DE E1FA 210860 LD HL,$6008 ; start of first 10h free bytes in the 2nd VRAM page E1FD 0680 LD B,$80 ; 80h loops next E1FF C5 PUSH BC ; <--- <--- <--- <--- <--- <--- <---| E200 011000 LD BC,$0010 ; | this copies 16 bytes E203 EDB0 LDIR ; copy 10 bytes from 6008 to C900 | at once from: | E205 011000 LD BC,$0010 ; | 6008 to C900 | MEANING: E208 09 ADD HL,BC ; increment HL by 10 | 6028 to C910 | CCP is restored E209 C1 POP BC ; retrieve crt. loop counter | ... | from backup in VRAM E20A 10F3 DJNZ $E1FF ; ---> ---> ---> ---> ---> ---> --->| 6FE8 to D0F0 | E20C 21F07E LD HL,$7EF0 ; * copy 6 bytes from 7EF0 (VRAM) to D100 (right below BDOS) E20F 0E06 LD C,$06 ; * (from 166h in sec5/cyl01/side1, BLOCK#2) E211 EDB0 LDIR ; * byte sequence: F9 16 00 00 00 1A E213 210400 LD HL,$0004 ; DSK Byte address E216 4E LD C,(HL) ; C = DSK Byte E217 3A40DF LD A,($DF40) ; 8255/port C mirror E21A E6BF AND $BF ; reset bit 6 (O6=0 -> DRAM#1 CPU access) E21C 3240DF LD ($DF40),A ; save new value to mirror E21F D3FE OUT ($FE),A ; out to port C E221 FB EI E222 ED4D RETI ; @@@ return address is C900, start of CCP, with C = DSK Byte ; ######## MAIN CTC3 INT. ROUTINE (E224) ######### E224 ED73CEFD LD ($FDCE),SP ; save current stack address at (FDCE-FDCF) E228 31CEFD LD SP,$FDCE ; set stack pointer to FDCE E22B F5 PUSH AF ; >save the E22C C5 PUSH BC ; >main E22D D5 PUSH DE ; >registers E22E E5 PUSH HL ; >on stack E22F 3B DEC SP E230 3B DEC SP ; decrease stack pointer by 2 E231 16FF LD D,$FF E233 214BDF LD HL,$DF4B E236 35 DEC (HL) E237 200C JR NZ,$E245 ; --->| jump if (DF4B)!=00 E239 3619 LD (HL),$19 ; | (DF4B)=19h=25 E23B 2B DEC HL ; | E23C 7E LD A,(HL) ; | E23D 23 INC HL ; | E23E B7 OR A ; | E23F 2804 JR Z,$E245 ; --->| jump if (DF4A)=00 E241 115CE8 LD DE,$E85C ; | E244 D5 PUSH DE ; | save E85C on stack E245 23 INC HL ; <---| E246 7E LD A,(HL) E247 B7 OR A E248 2010 JR NZ,$E25A ; --->| jump if (DF4C)!=00 E24A 01FE00 LD BC,$00FE ; | E24D ED78 IN A,(C) ; | test all keyboard lines (8255 port A) E24F 2F CPL ; | E250 E63F AND $3F ; | filter bits 0-5 (keyboard columns) E252 23 INC HL ; | HL=DF4D E253 2014 JR NZ,$E269 ; -->--->| jump if not all kbd lines are 0 E255 3601 LD (HL),$01 ; | | (DF4D)=01 E257 23 INC HL ; | | E258 36FF LD (HL),$FF ; | | (DF4E)=FF E25A 14 INC D ; <---|<--- <--| E25B 2015 JR NZ,$E272 ; ---> ---->| | E25D D1 POP DE ; | | | E25E E1 POP HL ; | | | E25F D1 POP DE ; | | | E260 C1 POP BC ; | | | E261 F1 POP AF ; | | | E262 ED7BCEFD LD SP,($FDCE) ; | | | E266 FB EI ; | | | E267 ED4D RETI ; | | | ; | | | E269 35 DEC (HL) ; <--- <-| | | E26A 20EE JR NZ,$E25A ; ---> --->--->| jump if (DF4D)!=00 E26C 3605 LD (HL),$05 ; | (DF4D)=05 E26E 11AFE8 LD DE,$E8AF ; | E271 D5 PUSH DE ; | save E8AF on stack E272 3E79 LD A,$79 ; <--- <----| CTC3 word: disable interrupt E274 D3FB OUT ($FB),A ; disable CTC3 interrupts E276 2140DF LD HL,$DF40 E279 7E LD A,(HL) E27A 23 INC HL E27B 77 LD (HL),A ; copy (DF40) to (DF41) E27C 2B DEC HL E27D F640 OR $40 ; set bit 6 E27F 77 LD (HL),A ; save to (DF40) E280 D3FE OUT ($FE),A ; set O6 to 1 E282 FB EI E283 ED4D RETI E285 F3 DI E286 2141DF LD HL,$DF41 E289 3E40 LD A,$40 E28B A6 AND (HL) E28C 2B DEC HL E28D CBB6 RES 6,(HL) E28F B6 OR (HL) E290 77 LD (HL),A E291 D3FE OUT ($FE),A E293 3EF9 LD A,$F9 E295 D3FB OUT ($FB),A E297 E1 POP HL E298 D1 POP DE E299 C1 POP BC E29A F1 POP AF E29B ED7BCEFD LD SP,($FDCE) E29F FB EI E2A0 C9 RET E2A1 EDA2 INI E2A3 FB EI ; ######## CTC0-1-2 INT. ROUTINE (E2A3) ######## E2A4 ED4D RETI E2A6 E5 PUSH HL E2A7 21A3E2 LD HL,$E2A3 E2AA 2298FD LD ($FD98),HL E2AD 215BDF LD HL,$DF5B E2B0 36FF LD (HL),$FF E2B2 E1 POP HL E2B3 FB EI E2B4 ED4D RETI E2B6 F3 DI E2B7 3A40DF LD A,($DF40) E2BA E6BF AND $BF E2BC D3FE OUT ($FE),A E2BE EDB0 LDIR E2C0 F640 OR $40 E2C2 D3FE OUT ($FE),A E2C4 FB EI E2C5 C9 RET E2C6 ED78 IN A,(C) E2C8 C9 RET E2C9 76 HALT ; <--- <--- <--- <--- <--- <--- <--- <--- <-----| E2CA DBF5 IN A,($F5) ; read 8272 Status Register | E2CC E620 AND $20 ; test bit 5 (NDM=0 when exec phase ended) | E2CE C2C9E2 JP NZ,$E2C9 ; if exec phase still in progress ---> ---> --->| E2D1 C9 RET E2D2 B7 OR A ; ################### UNK #3 (E2D2) #################### E2D3 3E79 LD A,$79 E2D5 2802 JR Z,$E2D9 E2D7 3EF9 LD A,$F9 E2D9 F3 DI E2DA D3FB OUT ($FB),A E2DC FB EI E2DD C9 RET E2DE CD3BE0 CALL $E03B E2E1 B7 OR A E2E2 28FA JR Z,$E2DE E2E4 CD00E5 CALL $E500 E2E7 3A4EDF LD A,($DF4E) E2EA 214CDF LD HL,$DF4C E2ED 3600 LD (HL),$00 E2EF C9 RET ; (E2F0) CONOUT if CONSOLE=TTY:/CRT: E2F0 79 LD A,C E2F1 3224E0 LD ($E024),A ; ($E024)=character to be written out E2F4 2123E0 LD HL,$E023 E2F7 CB6E BIT 5,(HL) E2F9 C21DE5 JP NZ,$E51D E2FC CB76 BIT 6,(HL) E2FE C2A8E3 JP NZ,$E3A8 E301 FE7F CP $7F E303 CAB1E3 JP Z,$E3B1 E306 E67F AND $7F E308 FE20 CP $20 E30A DAB1E3 JP C,$E3B1 E30D 4F LD C,A E30E 7E LD A,(HL) E30F E680 AND $80 E311 B1 OR C E312 2A1BE0 LD HL,($E01B) E315 BE CP (HL) E316 CA7FE5 JP Z,$E57F E319 77 LD (HL),A E31A 214ADF LD HL,$DF4A E31D 3600 LD (HL),$00 E31F CD39E3 CALL $E339 E322 214ADF LD HL,$DF4A E325 36FF LD (HL),$FF E327 23 INC HL E328 3601 LD (HL),$01 E32A C37FE5 JP $E57F E32D 7B LD A,E E32E E607 AND $07 E330 F638 OR $38 E332 1834 JR $E368 E334 7B LD A,E E335 E607 AND $07 E337 182F JR $E368 E339 47 LD B,A ; ######### (E339) ########## E33A 2128E0 LD HL,$E028 E33D 3600 LD (HL),$00 ; (E028)=00 E33F 78 LD A,B E340 CB7F BIT 7,A E342 2802 JR Z,$E346 ; --->| E344 36F0 LD (HL),$F0 ; |(E028)=F0 if bit7/A=1 E346 E67F AND $7F ; <---|filter for ASCII E348 D620 SUB $20 ; 20h=SPACE=lowest printable ASCII character E34A 6F LD L,A E34B 2600 LD H,$00 ; character index on 16 bit, SPACE=first char in table E34D 29 ADD HL,HL E34E 29 ADD HL,HL E34F 29 ADD HL,HL ; HL=HL*8 (each char has 8 lines) E350 ED4B45DF LD BC,($DF45) ; ($DF45)=7B00, base of character generator in VRAM E354 09 ADD HL,BC ; add table base addr to char index E355 3A21E0 LD A,($E021) E358 5F LD E,A E359 1660 LD D,$60 E35B E6F8 AND $F8 E35D 28CE JR Z,$E32D E35F FE48 CP $48 E361 28D1 JR Z,$E334 E363 1640 LD D,$40 E365 7B LD A,E E366 D608 SUB $08 E368 CB3F SRL A E36A 5F LD E,A E36B 3A22E0 LD A,($E022) E36E 0F RRCA E36F 0F RRCA E370 0F RRCA E371 E6E0 AND $E0 E373 83 ADD A,E E374 5F LD E,A E375 3A22E0 LD A,($E022) E378 E618 AND $18 E37A B2 OR D E37B 57 LD D,A E37C 0608 LD B,$08 E37E 3A21E0 LD A,($E021) E381 1F RRA E382 3014 JR NC,$E398 E384 4E LD C,(HL) E385 23 INC HL E386 3A28E0 LD A,($E028) E389 A9 XOR C E38A 1F RRA E38B 1F RRA E38C 1F RRA E38D 1F RRA E38E 4F LD C,A E38F 1A LD A,(DE) E390 E6F0 AND $F0 E392 B1 OR C E393 12 LD (DE),A E394 14 INC D E395 10ED DJNZ $E384 E397 C9 RET E398 4E LD C,(HL) E399 23 INC HL E39A 3A28E0 LD A,($E028) E39D A9 XOR C E39E 4F LD C,A E39F 1A LD A,(DE) E3A0 E60F AND $0F E3A2 B1 OR C E3A3 12 LD (DE),A E3A4 14 INC D E3A5 10F1 DJNZ $E398 E3A7 C9 RET E3A8 21C9E3 LD HL,$E3C9 E3AB E5 PUSH HL E3AC 210FE4 LD HL,$E40F E3AF 1803 JR $E3B4 E3B1 21CFE3 LD HL,$E3CF E3B4 FEFF CP $FF E3B6 C8 RET Z E3B7 110300 LD DE,$0003 E3BA 4E LD C,(HL) E3BB B9 CP C E3BC 2805 JR Z,$E3C3 E3BE 19 ADD HL,DE E3BF 0C INC C E3C0 20F8 JR NZ,$E3BA E3C2 C9 RET E3C3 23 INC HL E3C4 5E LD E,(HL) E3C5 23 INC HL E3C6 56 LD D,(HL) E3C7 EB EX DE,HL E3C8 E9 JP (HL) E3C9 2123E0 LD HL,$E023 E3CC CBB6 RES 6,(HL) E3CE C9 RET E3CF 02 LD (BC),A E3D0 67 LD H,A E3D1 E403A9 CALL PO,$A903 E3D4 E404B9 CALL PO,$B904 E3D7 E405FE CALL PO,$FE05 E3DA E5 PUSH HL E3DB 061A LD B,$1A E3DD E607 AND $07 E3DF FCE408 CALL M,$08E4 E3E2 70 LD (HL),B E3E3 E5 PUSH HL E3E4 09 ADD HL,BC E3E5 78 LD A,B E3E6 E5 PUSH HL E3E7 0A LD A,(BC) E3E8 A5 AND L E3E9 E5 PUSH HL E3EA 0D DEC C E3EB B1 OR C E3EC E5 PUSH HL E3ED 0EEA LD C,$EA E3EF E40FF4 CALL PO,$F40F E3F2 E4124F CALL PO,$4F12 E3F5 E615 AND $15 E3F7 7F LD A,A E3F8 E5 PUSH HL E3F9 1667 LD D,$67 E3FB E617 AND $17 E3FD 70 LD (HL),B E3FE E618 AND $18 E400 90 SUB B E401 E619 AND $19 E403 E0 RET PO E404 E61A AND $1A E406 5B LD E,E E407 E5 PUSH HL E408 1B DEC DE E409 E4E47F CALL PO,$7FE4 E40C 34 INC (HL) E40D E6FF AND $FF E40F 304F JR NC,$E460 E411 E431D0 CALL PO,$D031 E414 E433CC CALL PO,$CC33 E417 E434C8 CALL PO,$C834 E41A E435C0 CALL PO,$C035 E41D E4415B CALL PO,$5B41 E420 E5 PUSH HL E421 42 LD B,D E422 63 LD H,E E423 E5 PUSH HL E424 43 LD B,E E425 7F LD A,A E426 E5 PUSH HL E427 44 LD B,H E428 70 LD (HL),B E429 E5 PUSH HL E42A 45 LD B,L E42B 90 SUB B E42C E648 AND $48 E42E E0 RET PO E42F E649 AND $49 E431 9B SBC A,E E432 E5 PUSH HL E433 4A LD C,D E434 70 LD (HL),B E435 E64B AND $4B E437 67 LD H,A E438 E64C AND $4C E43A 1A LD A,(DE) E43B E64D AND $4D E43D FEE5 CP $E5 E43F 4E LD C,(HL) E440 EAE44F JP PE,$4FE4 E443 F4E452 CALL P,$52E4 E446 4F LD C,A E447 E653 AND $53 E449 34 INC (HL) E44A E659 AND $59 E44C DAE4FF JP C,$FFE4 E44F 3A3FDF LD A,($DF3F) E452 CD50EA CALL $EA50 E455 2113E0 LD HL,$E013 E458 111BE0 LD DE,$E01B E45B 010800 LD BC,$0008 E45E EDB0 LDIR E460 3A44DF LD A,($DF44) E463 12 LD (DE),A E464 C390E6 JP $E690 E467 3E07 LD A,$07 E469 A0 AND B E46A 47 LD B,A E46B 2140DF LD HL,$DF40 E46E F3 DI E46F 7E LD A,(HL) E470 E6F8 AND $F8 E472 B0 OR B E473 77 LD (HL),A E474 FB EI E475 3A43DF LD A,($DF43) E478 210078 LD HL,$7800 E47B 77 LD (HL),A E47C 54 LD D,H E47D 5D LD E,L E47E 13 INC DE E47F 010400 LD BC,$0004 E482 EDB0 LDIR E484 3A40DF LD A,($DF40) E487 E607 AND $07 E489 47 LD B,A E48A 07 RLCA E48B 07 RLCA E48C 07 RLCA E48D B0 OR B E48E 77 LD (HL),A E48F 011800 LD BC,$0018 E492 EDB0 LDIR E494 3A43DF LD A,($DF43) E497 77 LD (HL),A E498 010400 LD BC,$0004 E49B EDB0 LDIR E49D 112078 LD DE,$7820 E4A0 210078 LD HL,$7800 E4A3 01E002 LD BC,$02E0 E4A6 EDB0 LDIR E4A8 C9 RET E4A9 78 LD A,B E4AA 3243DF LD ($DF43),A E4AD 21005B LD HL,$5B00 E4B0 013000 LD BC,$0030 E4B3 CDEFE7 CALL $E7EF E4B6 C375E4 JP $E475 E4B9 78 LD A,B E4BA 323FDF LD ($DF3F),A E4BD C350EA JP $EA50 E4C0 3E01 LD A,$01 E4C2 2123E0 LD HL,$E023 E4C5 AE XOR (HL) E4C6 77 LD (HL),A E4C7 C9 RET E4C8 3E02 LD A,$02 E4CA 18F6 JR $E4C2 E4CC 3E04 LD A,$04 E4CE 18F2 JR $E4C2 E4D0 2123E0 LD HL,$E023 E4D3 7E LD A,(HL) E4D4 E687 AND $87 E4D6 F620 OR $20 E4D8 77 LD (HL),A E4D9 C9 RET E4DA 2123E0 LD HL,$E023 E4DD 7E LD A,(HL) E4DE E687 AND $87 E4E0 F628 OR $28 E4E2 77 LD (HL),A E4E3 C9 RET E4E4 2123E0 LD HL,$E023 E4E7 CBF6 SET 6,(HL) E4E9 C9 RET E4EA 212EE0 LD HL,$E02E E4ED 7E LD A,(HL) E4EE EE80 XOR $80 E4F0 CBFE SET 7,(HL) E4F2 18CE JR $E4C2 E4F4 212EE0 LD HL,$E02E E4F7 7E LD A,(HL) E4F8 CBBE RES 7,(HL) E4FA 18C6 JR $E4C2 E4FC 0EFF LD C,$FF E4FE 1802 JR $E502 E500 0E00 LD C,$00 E502 0610 LD B,$10 E504 F3 DI E505 3A40DF LD A,($DF40) E508 EE10 XOR $10 E50A 3240DF LD ($DF40),A E50D D3FE OUT ($FE),A E50F FB EI E510 C5 PUSH BC E511 CB01 RLC C E513 2002 JR NZ,$E517 E515 0610 LD B,$10 E517 10FE DJNZ $E517 E519 C1 POP BC E51A 10E8 DJNZ $E504 E51C C9 RET E51D 3E18 LD A,$18 E51F AE XOR (HL) E520 77 LD (HL),A E521 CB5F BIT 3,A E523 281F JR Z,$E544 E525 3A24E0 LD A,($E024) E528 D620 SUB $20 E52A 3811 JR C,$E53D E52C FE50 CP $50 E52E 3010 JR NC,$E540 E530 321FE0 LD ($E01F),A E533 CB66 BIT 4,(HL) E535 C0 RET NZ E536 3E87 LD A,$87 E538 A6 AND (HL) E539 77 LD (HL),A E53A C3C8E5 JP $E5C8 E53D AF XOR A E53E 18F0 JR $E530 E540 3E4F LD A,$4F E542 18EC JR $E530 E544 3A24E0 LD A,($E024) E547 D620 SUB $20 E549 3809 JR C,$E554 E54B FE18 CP $18 E54D 3008 JR NC,$E557 E54F 3220E0 LD ($E020),A E552 18DF JR $E533 E554 AF XOR A E555 18F8 JR $E54F E557 3E17 LD A,$17 E559 18F4 JR $E54F E55B 0600 LD B,$00 E55D 0E17 LD C,$17 E55F 16FF LD D,$FF E561 1806 JR $E569 E563 0617 LD B,$17 E565 0E00 LD C,$00 E567 1601 LD D,$01 E569 1E04 LD E,$04 E56B 2120E0 LD HL,$E020 E56E 181A JR $E58A E570 0600 LD B,$00 E572 0E4F LD C,$4F E574 16FF LD D,$FF E576 180D JR $E585 E578 211FE0 LD HL,$E01F E57B 7E LD A,(HL) E57C F607 OR $07 E57E 77 LD (HL),A E57F 064F LD B,$4F E581 0E00 LD C,$00 E583 1601 LD D,$01 E585 1E02 LD E,$02 E587 211FE0 LD HL,$E01F E58A 7E LD A,(HL) E58B B8 CP B E58C 2033 JR NZ,$E5C1 E58E 3A23E0 LD A,($E023) E591 A3 AND E E592 C0 RET NZ E593 71 LD (HL),C E594 CB53 BIT 2,E E596 C0 RET NZ E597 CB7A BIT 7,D E599 280A JR Z,$E5A5 E59B AF XOR A E59C 2120E0 LD HL,$E020 E59F BE CP (HL) E5A0 2878 JR Z,$E61A E5A2 35 DEC (HL) E5A3 1823 JR $E5C8 E5A5 3E17 LD A,$17 E5A7 2120E0 LD HL,$E020 E5AA BE CP (HL) E5AB CAF4E6 JP Z,$E6F4 E5AE 34 INC (HL) E5AF 1817 JR $E5C8 E5B1 3A23E0 LD A,($E023) E5B4 CB47 BIT 0,A E5B6 C4A5E5 CALL NZ,$E5A5 E5B9 AF XOR A E5BA 321FE0 LD ($E01F),A E5BD CDC8E5 CALL $E5C8 E5C0 C9 RET E5C1 34 INC (HL) E5C2 CB7A BIT 7,D E5C4 2802 JR Z,$E5C8 E5C6 35 DEC (HL) E5C7 35 DEC (HL) E5C8 3A20E0 LD A,($E020) E5CB CDE7E6 CALL $E6E7 E5CE 3A1FE0 LD A,($E01F) E5D1 4F LD C,A E5D2 09 ADD HL,BC E5D3 118BEA LD DE,$EA8B E5D6 19 ADD HL,DE E5D7 F3 DI E5D8 221BE0 LD ($E01B),HL E5DB 2A1FE0 LD HL,($E01F) E5DE 2221E0 LD ($E021),HL E5E1 FB EI E5E2 C9 RET E5E3 3A20E0 LD A,($E020) E5E6 3C INC A E5E7 CDE7E6 CALL $E6E7 E5EA 018BEA LD BC,$EA8B E5ED 09 ADD HL,BC E5EE C9 RET E5EF CDE3E5 CALL $E5E3 E5F2 EB EX DE,HL E5F3 210BF2 LD HL,$F20B E5F6 B7 OR A E5F7 ED52 SBC HL,DE E5F9 44 LD B,H E5FA 4D LD C,L E5FB 62 LD H,D E5FC 6B LD L,E E5FD C9 RET E5FE CDEFE5 CALL $E5EF E601 2006 JR NZ,$E609 E603 CD2BE6 CALL $E62B E606 C30BE8 JP $E80B E609 D5 PUSH DE E60A 115000 LD DE,$0050 E60D B7 OR A E60E ED52 SBC HL,DE E610 D1 POP DE E611 EB EX DE,HL E612 EDB0 LDIR E614 CD2BE6 CALL $E62B E617 C32DE8 JP $E82D E61A CDEFE5 CALL $E5EF E61D 28E4 JR Z,$E603 E61F 21BAF1 LD HL,$F1BA E622 110AF2 LD DE,$F20A E625 EDB8 LDDR E627 13 INC DE E628 EB EX DE,HL E629 18E9 JR $E614 E62B CDE9E7 CALL $E7E9 E62E AF XOR A E62F 321FE0 LD ($E01F),A E632 1894 JR $E5C8 E634 CDE3E5 CALL $E5E3 E637 2B DEC HL E638 ED5B1BE0 LD DE,($E01B) E63C B7 OR A E63D ED52 SBC HL,DE E63F 2807 JR Z,$E648 E641 44 LD B,H E642 4D LD C,L E643 62 LD H,D E644 6B LD L,E E645 23 INC HL E646 EDB0 LDIR E648 CDE1E7 CALL $E7E1 E64B 12 LD (DE),A E64C C30BE8 JP $E80B E64F CDE3E5 CALL $E5E3 E652 2B DEC HL E653 54 LD D,H E654 5D LD E,L E655 ED4B1BE0 LD BC,($E01B) E659 B7 OR A E65A ED42 SBC HL,BC E65C 28EA JR Z,$E648 E65E 44 LD B,H E65F 4D LD C,L E660 62 LD H,D E661 6B LD L,E E662 2B DEC HL E663 EDB8 LDDR E665 18E1 JR $E648 E667 CDE3E5 CALL $E5E3 E66A CD79E6 CALL $E679 E66D C30BE8 JP $E80B E670 210BF2 LD HL,$F20B E673 CD79E6 CALL $E679 E676 C32DE8 JP $E82D E679 ED5B1BE0 LD DE,($E01B) E67D B7 OR A E67E ED52 SBC HL,DE E680 44 LD B,H E681 4D LD C,L E682 CDE1E7 CALL $E7E1 E685 12 LD (DE),A E686 62 LD H,D E687 6B LD L,E E688 13 INC DE E689 0B DEC BC E68A 78 LD A,B E68B B1 OR C E68C C8 RET Z E68D EDB0 LDIR E68F C9 RET ; (E690) called from code in sector 1 cyl 00 side 0 E690 CD7FE8 CALL $E87F E693 210BF2 LD HL,$F20B E696 017800 LD BC,$0078 E699 CDE1E7 CALL $E7E1 E69C CDEFE7 CALL $E7EF E69F 210058 LD HL,$5800 E6A2 018001 LD BC,$0180 E6A5 CDD8E7 CALL $E7D8 E6A8 CDEFE7 CALL $E7EF E6AB 210060 LD HL,$6000 E6AE 54 LD D,H E6AF 5D LD E,L E6B0 13 INC DE E6B1 CDD8E7 CALL $E7D8 E6B4 06C0 LD B,$C0 E6B6 C5 PUSH BC E6B7 77 LD (HL),A E6B8 010700 LD BC,$0007 E6BB EDB0 LDIR E6BD 011100 LD BC,$0011 E6C0 09 ADD HL,BC E6C1 EB EX DE,HL E6C2 09 ADD HL,BC E6C3 EB EX DE,HL E6C4 010700 LD BC,$0007 E6C7 EDB0 LDIR E6C9 13 INC DE E6CA 23 INC HL E6CB C1 POP BC E6CC 10E8 DJNZ $E6B6 E6CE 21005B LD HL,$5B00 E6D1 013000 LD BC,$0030 E6D4 3A43DF LD A,($DF43) E6D7 CDEFE7 CALL $E7EF E6DA CD75E4 CALL $E475 E6DD CD76E8 CALL $E876 E6E0 AF XOR A E6E1 3220E0 LD ($E020),A E6E4 C3B9E5 JP $E5B9 E6E7 210000 LD HL,$0000 E6EA 115000 LD DE,$0050 E6ED 47 LD B,A E6EE B7 OR A E6EF C8 RET Z E6F0 19 ADD HL,DE E6F1 10FD DJNZ $E6F0 E6F3 C9 RET E6F4 CD7FE8 CALL $E87F E6F7 21DBEA LD HL,$EADB E6FA 118BEA LD DE,$EA8B E6FD 013007 LD BC,$0730 E700 EDB0 LDIR E702 CDE9E7 CALL $E7E9 E705 CDC8E5 CALL $E5C8 E708 AF XOR A E709 3225E0 LD ($E025),A E70C 3226E0 LD ($E026),A E70F 3227E0 LD ($E027),A E712 ED4B48DF LD BC,($DF48) E716 0C INC C E717 C5 PUSH BC E718 3EC1 LD A,$C1 E71A 91 SUB C E71B 47 LD B,A E71C C5 PUSH BC E71D CD69E7 CALL $E769 E720 012000 LD BC,$0020 E723 E5 PUSH HL E724 D5 PUSH DE E725 EDB0 LDIR E727 D1 POP DE E728 E1 POP HL E729 CBEC SET 5,H E72B CBEA SET 5,D E72D 010800 LD BC,$0008 E730 EDB0 LDIR E732 011000 LD BC,$0010 E735 09 ADD HL,BC E736 EB EX DE,HL E737 09 ADD HL,BC E738 EB EX DE,HL E739 010800 LD BC,$0008 E73C EDB0 LDIR E73E CBAC RES 5,H E740 CBAA RES 5,D E742 C1 POP BC E743 78 LD A,B E744 B9 CP C E745 301A JR NC,$E761 E747 C5 PUSH BC E748 010200 LD BC,$0002 E74B E5 PUSH HL E74C CDD8E7 CALL $E7D8 E74F CDEFE7 CALL $E7EF E752 E1 POP HL E753 CBEC SET 5,H E755 010200 LD BC,$0002 E758 CDD8E7 CALL $E7D8 E75B CDEFE7 CALL $E7EF E75E CBAC RES 5,H E760 C1 POP BC E761 10B9 DJNZ $E71C E763 C1 POP BC E764 10B1 DJNZ $E717 E766 C376E8 JP $E876 E769 3A26E0 LD A,($E026) E76C FE08 CP $08 E76E 3828 JR C,$E798 E770 AF XOR A E771 3226E0 LD ($E026),A E774 3A25E0 LD A,($E025) E777 FEE0 CP $E0 E779 3818 JR C,$E793 E77B AF XOR A E77C 3225E0 LD ($E025),A E77F 3A27E0 LD A,($E027) E782 FE10 CP $10 E784 3806 JR C,$E78C E786 AF XOR A E787 3227E0 LD ($E027),A E78A 180C JR $E798 E78C C608 ADD A,$08 E78E 3227E0 LD ($E027),A E791 1805 JR $E798 E793 C620 ADD A,$20 E795 3225E0 LD ($E025),A E798 2A25E0 LD HL,($E025) E79B 7C LD A,H E79C 3C INC A E79D 3226E0 LD ($E026),A E7A0 3A27E0 LD A,($E027) E7A3 B4 OR H E7A4 F640 OR $40 E7A6 67 LD H,A E7A7 5D LD E,L E7A8 54 LD D,H E7A9 3E07 LD A,$07 E7AB A4 AND H E7AC 47 LD B,A E7AD 3EE0 LD A,$E0 E7AF A5 AND L E7B0 0F RRCA E7B1 0F RRCA E7B2 B0 OR B E7B3 47 LD B,A E7B4 7C LD A,H E7B5 07 RLCA E7B6 07 RLCA E7B7 07 RLCA E7B8 E6C0 AND $C0 E7BA B0 OR B E7BB 47 LD B,A E7BC 3A48DF LD A,($DF48) E7BF 80 ADD A,B E7C0 FEC0 CP $C0 E7C2 D0 RET NC E7C3 47 LD B,A E7C4 E638 AND $38 E7C6 07 RLCA E7C7 07 RLCA E7C8 6F LD L,A E7C9 3EC0 LD A,$C0 E7CB A0 AND B E7CC 0F RRCA E7CD 0F RRCA E7CE 0F RRCA E7CF F640 OR $40 E7D1 4F LD C,A E7D2 3E07 LD A,$07 E7D4 A0 AND B E7D5 B1 OR C E7D6 67 LD H,A E7D7 C9 RET E7D8 3A23E0 LD A,($E023) E7DB E680 AND $80 E7DD C8 RET Z E7DE F6FF OR $FF E7E0 C9 RET E7E1 3A23E0 LD A,($E023) E7E4 E680 AND $80 E7E6 F620 OR $20 E7E8 C9 RET E7E9 010500 LD BC,$0005 E7EC CDE1E7 CALL $E7E1 E7EF F3 DI E7F0 ED7329E0 LD ($E029),SP E7F4 F9 LD SP,HL E7F5 67 LD H,A E7F6 6F LD L,A E7F7 E5 PUSH HL E7F8 E5 PUSH HL E7F9 E5 PUSH HL E7FA E5 PUSH HL E7FB E5 PUSH HL E7FC E5 PUSH HL E7FD E5 PUSH HL E7FE E5 PUSH HL E7FF 0B DEC BC E800 78 LD A,B E801 B1 OR C E802 C2F7E7 JP NZ,$E7F7 E805 ED7B29E0 LD SP,($E029) E809 FB EI E80A C9 RET E80B AF XOR A E80C 324ADF LD ($DF4A),A E80F 4F LD C,A E810 2A21E0 LD HL,($E021) E813 E5 PUSH HL E814 3A20E0 LD A,($E020) E817 CDE7E6 CALL $E6E7 E81A 118BEA LD DE,$EA8B E81D 19 ADD HL,DE E81E 09 ADD HL,BC E81F 3A20E0 LD A,($E020) E822 57 LD D,A E823 CD46E8 CALL $E846 E826 E1 POP HL E827 2221E0 LD ($E021),HL E82A C376E8 JP $E876 E82D AF XOR A E82E 324ADF LD ($DF4A),A E831 2A21E0 LD HL,($E021) E834 E5 PUSH HL E835 218BEA LD HL,$EA8B E838 1600 LD D,$00 E83A 0618 LD B,$18 E83C C5 PUSH BC E83D CD46E8 CALL $E846 E840 14 INC D E841 C1 POP BC E842 10F8 DJNZ $E83C E844 18E0 JR $E826 E846 59 LD E,C E847 0650 LD B,$50 E849 ED5321E0 LD ($E021),DE E84D C5 PUSH BC E84E D5 PUSH DE E84F E5 PUSH HL E850 46 LD B,(HL) E851 CD3AE3 CALL $E33A E854 E1 POP HL E855 D1 POP DE E856 C1 POP BC E857 1C INC E E858 23 INC HL E859 10EE DJNZ $E849 E85B C9 RET E85C 2A1BE0 LD HL,($E01B) E85F ED5B1DE0 LD DE,($E01D) E863 B7 OR A E864 ED52 SBC HL,DE E866 2020 JR NZ,$E888 E868 3E80 LD A,$80 E86A 212DE0 LD HL,$E02D E86D AE XOR (HL) E86E 77 LD (HL),A E86F 1A LD A,(DE) E870 E67F AND $7F E872 B6 OR (HL) E873 C339E3 JP $E339 E876 214ADF LD HL,$DF4A E879 36FF LD (HL),$FF E87B 23 INC HL E87C 3601 LD (HL),$01 E87E C9 RET E87F 214ADF LD HL,$DF4A ; ??? (=FF) E882 3600 LD (HL),$00 ; (DF4A)=FF E884 ED5B1DE0 LD DE,($E01D) ; DE=EA8B E888 1A LD A,(DE) ; A=(EA8B)=04 E889 2A21E0 LD HL,($E021) ; HL=0000 E88C E5 PUSH HL E88D 2A2FE0 LD HL,($E02F) ; HL=0000 E890 2221E0 LD ($E021),HL ; (E021)=(E02F) E893 CD39E3 CALL $E339 E896 E1 POP HL E897 2221E0 LD ($E021),HL E89A 222FE0 LD ($E02F),HL E89D 2A1BE0 LD HL,($E01B) E8A0 221DE0 LD ($E01D),HL E8A3 7E LD A,(HL) E8A4 E680 AND $80 E8A6 322DE0 LD ($E02D),A E8A9 3E01 LD A,$01 E8AB 324BDF LD ($DF4B),A E8AE C9 RET E8AF 21007E LD HL,$7E00 E8B2 3A50DF LD A,($DF50) E8B5 CB77 BIT 6,A E8B7 2803 JR Z,$E8BC E8B9 21307E LD HL,$7E30 E8BC 222BE0 LD ($E02B),HL E8BF 2E37 LD L,$37 E8C1 06FE LD B,$FE E8C3 0EFE LD C,$FE E8C5 11FFFF LD DE,$FFFF E8C8 CDC6E2 CALL $E2C6 E8CB 2F CPL E8CC E63F AND $3F E8CE 280E JR Z,$E8DE E8D0 67 LD H,A E8D1 7D LD A,L E8D2 14 INC D E8D3 C0 RET NZ E8D4 D608 SUB $08 E8D6 CB3C SRL H E8D8 30FA JR NC,$E8D4 E8DA 53 LD D,E E8DB 5F LD E,A E8DC 20F4 JR NZ,$E8D2 E8DE 2D DEC L E8DF CB00 RLC B E8E1 38E5 JR C,$E8C8 E8E3 7A LD A,D E8E4 3C INC A E8E5 201E JR NZ,$E905 E8E7 7B LD A,E E8E8 3C INC A E8E9 C8 RET Z E8EA 1600 LD D,$00 E8EC 7B LD A,E E8ED FE2A CP $2A E8EF 2854 JR Z,$E945 E8F1 2A2BE0 LD HL,($E02B) E8F4 19 ADD HL,DE E8F5 7E LD A,(HL) E8F6 FEFF CP $FF E8F8 205E JR NZ,$E958 E8FA 214FDF LD HL,$DF4F E8FD 3606 LD (HL),$06 E8FF 2B DEC HL E900 77 LD (HL),A E901 2B DEC HL E902 3601 LD (HL),$01 E904 C9 RET E905 FE21 CP $21 E907 281B JR Z,$E924 E909 FE08 CP $08 E90B 280F JR Z,$E91C E90D FE30 CP $30 E90F 7B LD A,E E910 2821 JR Z,$E933 E912 5A LD E,D E913 57 LD D,A E914 3C INC A E915 FE21 CP $21 E917 280B JR Z,$E924 E919 FE08 CP $08 E91B C0 RET NZ E91C 21C07E LD HL,$7EC0 E91F 222BE0 LD ($E02B),HL E922 18C6 JR $E8EA E924 21907E LD HL,$7E90 E927 18F6 JR $E91F E929 2150DF LD HL,$DF50 E92C CBBE RES 7,(HL) E92E 21607E LD HL,$7E60 E931 18EC JR $E91F E933 FE24 CP $24 E935 281B JR Z,$E952 E937 FE2B CP $2B E939 281B JR Z,$E956 E93B FE20 CP $20 E93D 20EA JR NZ,$E929 E93F 2150DF LD HL,$DF50 E942 CBFE SET 7,(HL) E944 C9 RET E945 2150DF LD HL,$DF50 E948 CB7E BIT 7,(HL) E94A CBBE RES 7,(HL) E94C 28A3 JR Z,$E8F1 E94E 3E09 LD A,$09 E950 1806 JR $E958 E952 3E90 LD A,$90 E954 1802 JR $E958 E956 3E7F LD A,$7F E958 214EDF LD HL,$DF4E E95B BE CP (HL) E95C 23 INC HL E95D 2809 JR Z,$E968 E95F 3606 LD (HL),$06 E961 2B DEC HL E962 77 LD (HL),A E963 2B DEC HL E964 2B DEC HL E965 36FF LD (HL),$FF E967 C9 RET E968 35 DEC (HL) E969 C0 RET NZ E96A 3601 LD (HL),$01 E96C 2B DEC HL E96D 2B DEC HL E96E 3601 LD (HL),$01 E970 2B DEC HL E971 36FF LD (HL),$FF E973 C9 RET ; ################### LISTST (E974) #################### E974 3A0300 LD A,($0003) ; load IOBYTE into A E977 07 RLCA ; test LIST field (bits 6,7) - see CP/M OS Manual pag 6-19 E978 3EFF LD A,$FF ; E97A D0 RET NC ; if IOBYTE bit 7 is 0 (LIST device is NOT LPT: or UL1), return with A=$FF ... E97B DBFE IN A,($FE) ; ... otherwise read port $FE ... E97D E680 AND $80 ; ... and check bit 7 (SI signal to 8255) ... E97F C8 RET Z ; ... and if zero (RS232 logical "1", meaning idle serial input line) return with A=$00 ... E980 F6FF OR $FF E982 C9 RET ; ... otherwise return with A=$FF ; ################### LIST (E983) #################### E983 3A0300 LD A,($0003) ; load IOBYTE into A E986 07 RLCA ; test LIST field upper bit (bit 7) - see CP/M OS Manual pag 6-19 E987 D23AE1 JP NC,$E13A ; if IOBYTE bit 7 is 0 (LIST device is NOT LPT: or UL1), jump to ????? ... E98A 07 RLCA ; ... otherwise test LIST field lower bit (bit 6) E98B DA12DF JP C,$DF12 ; ... and if IOBYTE bit 6 is 1 (LIST device is UL1), jump to PUNCH entry point in jump table ; ################### PUNCH (E98E) #################### E98E CD7BE9 CALL $E97B ; read port $FE and check bit 7 (SI signal to 8255) E991 28FB JR Z,$E98E ; if zero (RS232 logical "1", meaning idle serial input line), repeat above E993 F3 DI E994 3A40DF LD A,($DF40) ; load port C mirror byte into A E997 E678 AND $78 ; zero out SO and border bits (keep TO,LS,05,06) E999 5F LD E,A ; copy to E E99A 217EEA LD HL,$EA7E ; ($EA7E) contains $08 E99D 46 LD B,(HL) ; B=8 as down counter for DJNZ (8 serial bits to send out) E99E 23 INC HL ; HL=$EA7F E99F 3680 LD (HL),$80 ; ($EA7F)=$80 <--- <--- <--- <--- <--- <--- <--- <--- <--- <--- <--- <--| E9A1 23 INC HL ; HL=$EA80 | E9A2 79 LD A,C ; load char to be sent out into A | E9A3 2F CPL ; invert al bits (CoBra serial interface does not invert TTL levels when translating to RS232 levels) E9A4 0F RRCA ; rotate A right exposing bit 0 in CY <--- <----| E9A5 57 LD D,A ; backup A to D | this will load ($EA80-$EA87) E9A6 E687 AND $87 ; zero out bits 3-6 | with 8 consecutive bytes having E9A8 B3 OR E ; get bits 3-6 (TO,LS,05,06) from E | serial out data in their bit 7 and E9A9 77 LD (HL),A ; save A to ($EA80) | the initial port $FE bit values for TO,LS,05,06 E9AA 7A LD A,D ; restore A from D | The border bits (0-2) are zeroed E9AB 23 INC HL ; HL=$EA81 | | E9AC 10F6 DJNZ $E9A4 ; ---> ---> ---> ---> ---> ---> ---> ---> ----->| | E9AE 3600 LD (HL),$00 ; ($EA88)=$00 (for the stop bit) | E9B0 217EEA LD HL,$EA7E ; ($EA7E) contains $08 | E9B3 46 LD B,(HL) ; B=8 as down counter for DJNZ (8 serial bits to send out) | E9B4 04 INC B ; | E9B5 04 INC B ; B=10 (10 bits total to send out including start and stop bits) | E9B6 23 INC HL ; HL=$EA7F | E9B7 7E LD A,(HL) ; ($EA7F)=$80 (bit7=1) mem location previously set ---> ---> ---> ---/ <--- <--- <----| 7 T-States E9B8 D3FE OUT ($FE),A ; send out a bit of "1" (Start Bit with RS232 logical level "0") | 11 T-States E9BA 23 INC HL ; point to next byte to send out | 6 T-States E9BB 3A7DEA LD A,($EA7D) ; A=$03 | 13 T-States E9BE 4F LD C,A ; C=$03 | 4 T-States E9BF 110000 LD DE,$0000 ; delay 10 T-States | 10 T-States E9C2 CD36EA CALL $EA36 ; delay 91xC T-States | 91xC T-States E9C5 10F0 DJNZ $E9B7 ; loop 10 times, sending out 10 bytes ($EA7F-$EA88) having serial out data in bits 7 --->| 13 T-States E9C7 3A40DF LD A,($DF40) ; get port $FE backup value in A E9CA D3FE OUT ($FE),A ; restore initial value of out port $FE E9CC F6FF OR $FF ; A=$FF E9CE FB EI E9CF C9 RET E9D0 CDD9E9 CALL $E9D9 ; ################### READER (E9D0) #################### E9D3 28FB JR Z,$E9D0 E9D5 3A8AEA LD A,($EA8A) E9D8 C9 RET E9D9 F3 DI E9DA 3A40DF LD A,($DF40) E9DD CBFF SET 7,A E9DF D3FE OUT ($FE),A E9E1 0600 LD B,$00 E9E3 DBFE IN A,($FE) E9E5 07 RLCA E9E6 DAF3E9 JP C,$E9F3 E9E9 10F8 DJNZ $E9E3 E9EB 3A40DF LD A,($DF40) E9EE D3FE OUT ($FE),A E9F0 AF XOR A E9F1 FB EI E9F2 C9 RET E9F3 217EEA LD HL,$EA7E E9F6 46 LD B,(HL) E9F7 04 INC B E9F8 04 INC B E9F9 23 INC HL E9FA 110000 LD DE,$0000 E9FD 3A7DEA LD A,($EA7D) EA00 4F LD C,A EA01 DBFE IN A,($FE) EA03 77 LD (HL),A EA04 23 INC HL EA05 CD36EA CALL $EA36 EA08 10F0 DJNZ $E9FA EA0A 3A40DF LD A,($DF40) EA0D D3FE OUT ($FE),A EA0F E6F8 AND $F8 EA11 5F LD E,A EA12 2B DEC HL EA13 CB7E BIT 7,(HL) EA15 20D9 JR NZ,$E9F0 EA17 217EEA LD HL,$EA7E EA1A 46 LD B,(HL) EA1B 23 INC HL EA1C CB7E BIT 7,(HL) EA1E 28D0 JR Z,$E9F0 EA20 0EFF LD C,$FF EA22 23 INC HL EA23 7E LD A,(HL) EA24 07 RLCA EA25 CB19 RR C EA27 E607 AND $07 EA29 B3 OR E EA2A D3FE OUT ($FE),A EA2C 23 INC HL EA2D 10F4 DJNZ $EA23 EA2F 79 LD A,C EA30 2F CPL EA31 328AEA LD ($EA8A),A EA34 1891 JR $E9C7 ; ################### LPT DELAY #################### EA36 110000 LD DE,$0000 ; 10 T States EA39 110000 LD DE,$0000 EA3C 110000 LD DE,$0000 EA3F 110000 LD DE,$0000 EA42 110000 LD DE,$0000 EA45 ED57 LD A,I ; 9 T States EA47 ED57 LD A,I EA49 ED57 LD A,I EA4B 0D DEC C ; (77+4+10 T-States)xC delay loop (approx 26 microsec) EA4C C236EA JP NZ,$EA36 EA4F C9 RET EA50 323FDF LD ($DF3F),A ; ################### UNK #4 (EA50) #################### EA53 47 LD B,A EA54 E607 AND $07 EA56 5F LD E,A EA57 1600 LD D,$00 EA59 2171EA LD HL,$EA71 EA5C 19 ADD HL,DE EA5D 7E LD A,(HL) EA5E 327DEA LD ($EA7D),A EA61 78 LD A,B EA62 E618 AND $18 EA64 0F RRCA EA65 0F RRCA EA66 0F RRCA EA67 5F LD E,A EA68 2179EA LD HL,$EA79 EA6B 19 ADD HL,DE EA6C 7E LD A,(HL) EA6D 327EEA LD ($EA7E),A EA70 C9 RET EA71 FF DEFB $FF EA72 7F DEFB $7F EA73 3F DEFB $3F EA74 1F DEFB $1F EA75 0F DEFB $0F EA76 07 DEFB $07 EA77 03 DEFB $03 EA78 01 DEFB $01 EA79 05 DEFB $05 EA7A 06 DEFB $06 EA7B 07 DEFB $07 EA7C 08 DEFB $08 EA7D 03 DEFB $03 ; sets the baud rate (see LPT DELAY routine above) EA7E 08 DEFB $08 EA7F 00 DEFB $00 EA80 00 DEFB $00 EA81 00 DEFB $00 EA82 00 DEFB $00 EA83 00 DEFB $00 EA84 00 DEFB $00 EA85 00 DEFB $00 EA86 00 DEFB $00 EA87 00 DEFB $00 EA88 00 DEFB $00 EA89 00 DEFB $00 EA8A 00 DEFB $00 EA8B 04 DEFB $04 EA8C 00 DEFB $00 EA8D 00 DEFB $00 EA8E 00 DEFB $00 EA8F 00 DEFB $00 EA90 00 DEFB $00 EA91 00 DEFB $00 EA92 00 DEFB $00 EA93 00 DEFB $00 EA94 00 DEFB $00 EA95 00 DEFB $00 EA96 00 DEFB $00 EA97 00 DEFB $00 EA98 00 DEFB $00 EA99 00 DEFB $00 EA9A 00 DEFB $00 EA9B 00 DEFB $00 EA9C 00 DEFB $00 EA9D 00 DEFB $00 EA9E 00 DEFB $00 EA9F 00 DEFB $00 EAA0 00 DEFB $00 EAA1 00 DEFB $00 EAA2 00 DEFB $00 EAA3 00 DEFB $00 EAA4 00 DEFB $00 EAA5 00 DEFB $00 EAA6 00 DEFB $00 EAA7 00 DEFB $00 EAA8 00 DEFB $00 EAA9 00 DEFB $00 EAAA 00 DEFB $00 EAAB 00 DEFB $00 EAAC 00 DEFB $00 EAAD 00 DEFB $00 EAAE 00 DEFB $00 EAAF 00 DEFB $00 EAB0 00 DEFB $00 EAB1 00 DEFB $00 EAB2 00 DEFB $00 EAB3 00 DEFB $00 EAB4 00 DEFB $00 EAB5 00 DEFB $00 EAB6 00 DEFB $00 EAB7 00 DEFB $00 EAB8 00 DEFB $00 EAB9 00 DEFB $00 EABA 00 DEFB $00 EABB 00 DEFB $00 EABC 00 DEFB $00 EABD 00 DEFB $00 EABE 00 DEFB $00 EABF 00 DEFB $00 EAC0 00 DEFB $00 EAC1 00 DEFB $00 EAC2 00 DEFB $00 EAC3 00 DEFB $00 EAC4 00 DEFB $00 EAC5 00 DEFB $00 EAC6 00 DEFB $00 EAC7 00 DEFB $00 EAC8 00 DEFB $00 EAC9 00 DEFB $00 EACA 00 DEFB $00 EACB 00 DEFB $00 EACC 00 DEFB $00 EACD 00 DEFB $00 EACE 00 DEFB $00 EACF 00 DEFB $00 EAD0 00 DEFB $00 EAD1 00 DEFB $00 EAD2 00 DEFB $00 EAD3 00 DEFB $00 EAD4 00 DEFB $00 EAD5 00 DEFB $00 EAD6 00 DEFB $00 EAD7 00 DEFB $00 EAD8 00 DEFB $00 EAD9 00 DEFB $00 EADA 00 DEFB $00 EADB 00 DEFB $00 EADC 00 DEFB $00 EADD 00 DEFB $00 EADE 00 DEFB $00 EADF 00 DEFB $00 EAE0 00 DEFB $00 EAE1 00 DEFB $00 EAE2 00 DEFB $00 EAE3 00 DEFB $00 EAE4 00 DEFB $00 EAE5 00 DEFB $00 EAE6 00 DEFB $00 EAE7 00 DEFB $00 EAE8 00 DEFB $00 EAE9 00 DEFB $00 EAEA 00 DEFB $00 EAEB 00 DEFB $00 EAEC 00 DEFB $00 EAED 00 DEFB $00 EAEE 00 DEFB $00 EAEF 00 DEFB $00 EAF0 00 DEFB $00 EAF1 00 DEFB $00 EAF2 00 DEFB $00 EAF3 00 DEFB $00 EAF4 00 DEFB $00 EAF5 00 DEFB $00 EAF6 00 DEFB $00 EAF7 00 DEFB $00 EAF8 00 DEFB $00 EAF9 00 DEFB $00 EAFA 00 DEFB $00 EAFB 00 DEFB $00 EAFC 00 DEFB $00 EAFD 00 DEFB $00 EAFE 00 DEFB $00 EAFF 00 DEFB $00 EB00 00 DEFB $00 EB01 00 DEFB $00 EB02 00 DEFB $00 EB03 00 DEFB $00 EB04 00 DEFB $00 EB05 00 DEFB $00 EB06 00 DEFB $00 EB07 00 DEFB $00 EB08 00 DEFB $00 EB09 00 DEFB $00 EB0A 00 DEFB $00 EB0B 00 DEFB $00 EB0C 00 DEFB $00 EB0D 00 DEFB $00 EB0E 00 DEFB $00 EB0F 00 DEFB $00 EB10 00 DEFB $00 EB11 00 DEFB $00 EB12 00 DEFB $00 EB13 00 DEFB $00 EB14 00 DEFB $00 EB15 00 DEFB $00 EB16 00 DEFB $00 EB17 00 DEFB $00 EB18 00 DEFB $00 EB19 00 DEFB $00 EB1A 00 DEFB $00 EB1B 00 DEFB $00 EB1C 00 DEFB $00 EB1D 00 DEFB $00 EB1E 00 DEFB $00 EB1F 00 DEFB $00 EB20 00 DEFB $00 EB21 00 DEFB $00 EB22 00 DEFB $00 EB23 00 DEFB $00 EB24 00 DEFB $00 EB25 00 DEFB $00 EB26 00 DEFB $00 EB27 00 DEFB $00 EB28 00 DEFB $00 EB29 00 DEFB $00 EB2A 00 DEFB $00 EB2B 00 DEFB $00 EB2C 00 DEFB $00 EB2D 00 DEFB $00 EB2E 00 DEFB $00 EB2F 00 DEFB $00 EB30 00 DEFB $00 EB31 00 DEFB $00 EB32 00 DEFB $00 EB33 00 DEFB $00 EB34 00 DEFB $00 EB35 00 DEFB $00 EB36 00 DEFB $00 EB37 00 DEFB $00 EB38 00 DEFB $00 EB39 00 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$00 FA9A 00 DEFB $00 FA9B 00 DEFB $00 FA9C 00 DEFB $00 FA9D 00 DEFB $00 FA9E 00 DEFB $00 FA9F 00 DEFB $00 FAA0 00 DEFB $00 FAA1 00 DEFB $00 FAA2 00 DEFB $00 FAA3 00 DEFB $00 FAA4 00 DEFB $00 FAA5 00 DEFB $00 FAA6 00 DEFB $00 FAA7 00 DEFB $00 FAA8 00 DEFB $00 FAA9 00 DEFB $00 FAAA 00 DEFB $00 FAAB 00 DEFB $00 FAAC 00 DEFB $00 FAAD 00 DEFB $00 FAAE 00 DEFB $00 FAAF 00 DEFB $00 FAB0 00 DEFB $00 FAB1 00 DEFB $00 FAB2 00 DEFB $00 FAB3 00 DEFB $00 FAB4 00 DEFB $00 FAB5 00 DEFB $00 FAB6 00 DEFB $00 FAB7 00 DEFB $00 FAB8 00 DEFB $00 FAB9 00 DEFB $00 FABA 00 DEFB $00 FABB 00 DEFB $00 FABC 00 DEFB $00 FABD 00 DEFB $00 FABE 00 DEFB $00 FABF 00 DEFB $00 FAC0 00 DEFB $00 FAC1 00 DEFB $00 FAC2 00 DEFB $00 FAC3 00 DEFB $00 FAC4 00 DEFB $00 FAC5 00 DEFB $00 FAC6 00 DEFB $00 FAC7 00 DEFB $00 FAC8 00 DEFB $00 FAC9 00 DEFB $00 FACA 00 DEFB $00 FACB 00 DEFB $00 FACC 00 DEFB $00 FACD 00 DEFB $00 FACE 00 DEFB $00 FACF 00 DEFB $00 FAD0 00 DEFB $00 FAD1 00 DEFB $00 FAD2 00 DEFB $00 FAD3 00 DEFB $00 FAD4 00 DEFB $00 FAD5 00 DEFB $00 FAD6 00 DEFB $00 FAD7 00 DEFB $00 FAD8 00 DEFB $00 FAD9 00 DEFB $00 FADA 00 DEFB $00 FADB 00 DEFB $00 FADC 00 DEFB $00 FADD 00 DEFB $00 FADE 00 DEFB $00 FADF 00 DEFB $00 FAE0 00 DEFB $00 FAE1 00 DEFB $00 FAE2 00 DEFB $00 FAE3 00 DEFB $00 FAE4 00 DEFB $00 FAE5 00 DEFB $00 FAE6 00 DEFB $00 FAE7 00 DEFB $00 FAE8 00 DEFB $00 FAE9 00 DEFB $00 FAEA 00 DEFB $00 FAEB 00 DEFB $00 FAEC 00 DEFB $00 FAED 00 DEFB $00 FAEE 00 DEFB $00 FAEF 00 DEFB $00 FAF0 00 DEFB $00 FAF1 00 DEFB $00 FAF2 00 DEFB $00 FAF3 00 DEFB $00 FAF4 00 DEFB $00 FAF5 00 DEFB $00 FAF6 00 DEFB $00 FAF7 00 DEFB $00 FAF8 00 DEFB $00 FAF9 00 DEFB $00 FAFA 00 DEFB $00 FAFB 00 DEFB $00 FAFC 00 DEFB $00 FAFD 00 DEFB $00 FAFE 00 DEFB $00 FAFF 00 DEFB $00 ; ######## DPBASE (FB00) ######### FB00 F9 DEFB $F9 ; (FB00) ----- DPH#0 base addr FB01 DF DEFB $DF ; XLT=DFF9 FB02 00 DEFB $00 ; * BDOS FB03 00 DEFB $00 ; * FB04 00 DEFB $00 ; * scratch FB05 00 DEFB $00 ; * pad FB06 00 DEFB $00 ; * FB07 00 DEFB $00 ; * area FB08 80 DEFB $80 ; \ FB09 FB DEFB $FB ; / DIRBUF=FB80 FB0A EA DEFB $EA ; \ FB0B DF DEFB $DF ; / DPB=DFEA FB0C 10 DEFB $10 ; \ FB0D FC DEFB $FC ; / CSV=FC10 FB0E 90 DEFB $90 ; \ FB0F FC DEFB $FC ; / ALV=FC90 FB10 F9 DEFB $F9 ; (FB10) ----- DPH#1 base addr FB11 DF DEFB $DF ; XLT=DFF9 FB12 00 DEFB $00 ; * BDOS FB13 00 DEFB $00 ; * FB14 00 DEFB $00 ; * scratch FB15 00 DEFB $00 ; * pad FB16 00 DEFB $00 ; * FB17 00 DEFB $00 ; * area FB18 80 DEFB $80 ; \ FB19 FB DEFB $FB ; / DIRBUF=FB80 FB1A EA DEFB $EA ; \ FB1B DF DEFB $DF ; / DPB=DFEA FB1C 20 DEFB $20 ; \ FB1D FC DEFB $FC ; / CSV=FC20 FB1E B0 DEFB $B0 ; \ FB1F FC DEFB $FC ; / ALV=FCB0 FB20 D9 DEFB $D9 ; (FB20) ----- DPH#2 base addr FB21 DF DEFB $DF ; XLT=DFD9 FB22 00 DEFB $00 ; * BDOS FB23 00 DEFB $00 ; * FB24 00 DEFB $00 ; * scratch FB25 00 DEFB $00 ; * pad FB26 00 DEFB $00 ; * FB27 00 DEFB $00 ; * area FB28 80 DEFB $80 ; \ FB29 FB DEFB $FB ; / DIRBUF=FB80 FB2A CA DEFB $CA ; \ FB2B DF DEFB $DF ; / DPB=DFCA FB2C 30 DEFB $30 ; \ FB2D FC DEFB $FC ; / CSV=FC30 FB2E D0 DEFB $D0 ; \ FB2F FC DEFB $FC ; / ALV=FCD0 FB30 D9 DEFB $D9 ; (FB30) ----- DPH#3 base addr FB31 DF DEFB $DF ; XLT=DFD9 FB32 00 DEFB $00 ; * BDOS FB33 00 DEFB $00 ; * FB34 00 DEFB $00 ; * scratch FB35 00 DEFB $00 ; * pad FB36 00 DEFB $00 ; * FB37 00 DEFB $00 ; * area FB38 80 DEFB $80 ; \ FB39 FB DEFB $FB ; / DIRBUF=FB80 FB3A CA DEFB $CA ; \ FB3B DF DEFB $DF ; / DPB=DFCA FB3C 50 DEFB $50 ; \ FB3D FC DEFB $FC ; / CSV=FC50 FB3E 10 DEFB $10 ; \ FB3F FD DEFB $FD ; / ALV=FD10 FB40 D9 DEFB $D9 ; (FB40) ----- DPH#4 base addr FB41 DF DEFB $DF ; XLT=DFD9 FB42 00 DEFB $00 ; * BDOS FB43 00 DEFB $00 ; * FB44 00 DEFB $00 ; * scratch FB45 00 DEFB $00 ; * pad FB46 00 DEFB $00 ; * FB47 00 DEFB $00 ; * area FB48 80 DEFB $80 ; \ FB49 FB DEFB $FB ; / DIRBUF=FB80 FB4A CA DEFB $CA ; \ FB4B DF DEFB $DF ; / DPB=DFCA FB4C 70 DEFB $70 ; \ FB4D FC DEFB $FC ; / CSV=FC70 FB4E 50 DEFB $50 ; \ FB4F FD DEFB $FD ; / ALV=FD50 FB50 77 DEFB $77 ; (FB50) ----- DPH#5 base addr FB51 DF DEFB $DF ; XLT=DF77 FB52 00 DEFB $00 ; * BDOS FB53 00 DEFB $00 ; * FB54 00 DEFB $00 ; * scratch FB55 00 DEFB $00 ; * pad FB56 00 DEFB $00 ; * FB57 00 DEFB $00 ; * area FB58 80 DEFB $80 ; \ FB59 FB DEFB $FB ; / DIRBUF=FB80 FB5A CA DEFB $CA ; \ FB5B DF DEFB $DF ; / DPB=DFCA FB5C 70 DEFB $70 ; \ FB5D FC DEFB $FC ; / CSV=FC70 FB5E 50 DEFB $50 ; \ FB5F FD DEFB $FD ; / ALV=FD50 FB60 98 DEFB $98 ; (FB60) ----- DPH#6 base addr FB61 DF DEFB $DF ; XLT=DF98 FB62 00 DEFB $00 ; * BDOS FB63 00 DEFB $00 ; * FB64 00 DEFB $00 ; * scratch FB65 00 DEFB $00 ; * pad FB66 00 DEFB $00 ; * FB67 00 DEFB $00 ; * area FB68 80 DEFB $80 ; \ FB69 FB DEFB $FB ; / DIRBUF=FB80 FB6A CA DEFB $CA ; \ FB6B DF DEFB $DF ; / DPB=DFCA FB6C 70 DEFB $70 ; \ FB6D FC DEFB $FC ; / CSV=FC70 FB6E 50 DEFB $50 ; \ FB6F FD DEFB $FD ; / ALV=FD50 FB70 B8 DEFB $B8 ; (FB70) ----- DPH#7 base addr FB71 DF DEFB $DF ; XLT=DFB8 FB72 00 DEFB $00 ; * BDOS FB73 00 DEFB $00 ; * FB74 00 DEFB $00 ; * scratch FB75 00 DEFB $00 ; * pad FB76 00 DEFB $00 ; * FB77 00 DEFB $00 ; * area FB78 80 DEFB $80 ; \ FB79 FB DEFB $FB ; / DIRBUF=FB80 FB7A CA DEFB $CA ; \ FB7B DF DEFB $DF ; / DPB=DFCA FB7C 70 DEFB $70 ; \ FB7D FC DEFB $FC ; / CSV=FC70 FB7E 50 DEFB $50 ; \ FB7F FD DEFB $FD ; / ALV=FD50 ; ####### DPH TABLE END ######## FB80 00 DEFB $00 ; ####### DIRBUF (FB80) ####### FB81 00 DEFB $00 FB82 00 DEFB $00 FB83 00 DEFB $00 FB84 00 DEFB $00 FB85 00 DEFB $00 FB86 00 DEFB $00 FB87 00 DEFB $00 FB88 00 DEFB $00 FB89 00 DEFB $00 FB8A 00 DEFB $00 FB8B 00 DEFB $00 FB8C 00 DEFB $00 FB8D 00 DEFB $00 FB8E 00 DEFB $00 FB8F 00 DEFB $00 FB90 00 DEFB $00 FB91 00 DEFB $00 FB92 00 DEFB $00 FB93 00 DEFB $00 FB94 00 DEFB $00 FB95 00 DEFB $00 FB96 00 DEFB $00 FB97 00 DEFB $00 FB98 00 DEFB $00 FB99 00 DEFB $00 FB9A 00 DEFB $00 FB9B 00 DEFB $00 FB9C 00 DEFB $00 FB9D 00 DEFB $00 FB9E 00 DEFB $00 FB9F 00 DEFB $00 FBA0 00 DEFB $00 FBA1 00 DEFB $00 FBA2 00 DEFB $00 FBA3 00 DEFB $00 FBA4 00 DEFB $00 FBA5 00 DEFB $00 FBA6 00 DEFB $00 FBA7 00 DEFB $00 FBA8 00 DEFB $00 FBA9 00 DEFB $00 FBAA 00 DEFB $00 FBAB 00 DEFB $00 FBAC 00 DEFB $00 FBAD 00 DEFB $00 FBAE 00 DEFB $00 FBAF 00 DEFB $00 FBB0 00 DEFB $00 FBB1 00 DEFB $00 FBB2 00 DEFB $00 FBB3 00 DEFB $00 FBB4 00 DEFB $00 FBB5 00 DEFB $00 FBB6 00 DEFB $00 FBB7 00 DEFB $00 FBB8 00 DEFB $00 FBB9 00 DEFB $00 FBBA 00 DEFB $00 FBBB 00 DEFB $00 FBBC 00 DEFB $00 FBBD 00 DEFB $00 FBBE 00 DEFB $00 FBBF 00 DEFB $00 FBC0 00 DEFB $00 FBC1 00 DEFB $00 FBC2 00 DEFB $00 FBC3 00 DEFB $00 FBC4 00 DEFB $00 FBC5 00 DEFB $00 FBC6 00 DEFB $00 FBC7 00 DEFB $00 FBC8 00 DEFB $00 FBC9 00 DEFB $00 FBCA 00 DEFB $00 FBCB 00 DEFB $00 FBCC 00 DEFB $00 FBCD 00 DEFB $00 FBCE 00 DEFB $00 FBCF 00 DEFB $00 FBD0 00 DEFB $00 FBD1 00 DEFB $00 FBD2 00 DEFB $00 FBD3 00 DEFB $00 FBD4 00 DEFB $00 FBD5 00 DEFB $00 FBD6 00 DEFB $00 FBD7 00 DEFB $00 FBD8 00 DEFB $00 FBD9 00 DEFB $00 FBDA 00 DEFB $00 FBDB 00 DEFB $00 FBDC 00 DEFB $00 FBDD 00 DEFB $00 FBDE 00 DEFB $00 FBDF 00 DEFB $00 FBE0 00 DEFB $00 FBE1 00 DEFB $00 FBE2 00 DEFB $00 FBE3 00 DEFB $00 FBE4 00 DEFB $00 FBE5 00 DEFB $00 FBE6 00 DEFB $00 FBE7 00 DEFB $00 FBE8 00 DEFB $00 FBE9 00 DEFB $00 FBEA 00 DEFB $00 FBEB 00 DEFB $00 FBEC 00 DEFB $00 FBED 00 DEFB $00 FBEE 00 DEFB $00 FBEF 00 DEFB $00 FBF0 00 DEFB $00 FBF1 00 DEFB $00 FBF2 00 DEFB $00 FBF3 00 DEFB $00 FBF4 00 DEFB $00 FBF5 00 DEFB $00 FBF6 00 DEFB $00 FBF7 00 DEFB $00 FBF8 00 DEFB $00 FBF9 00 DEFB $00 FBFA 00 DEFB $00 FBFB 00 DEFB $00 FBFC 00 DEFB $00 FBFD 00 DEFB $00 FBFE 00 DEFB $00 FBFF 00 DEFB $00 ; ######## DIRBUF END ######## FC00 00 DEFB $00 ; (FC00) physical number for drive A: FC01 01 DEFB $01 ; (FC01) physical number for drive B: FC02 02 DEFB $02 ; (FC02) physical number for drive C: FC03 03 DEFB $03 ; (FC03) physical number for drive D: FC04 02 DEFB $02 ; (FC04) physical number for drive E: FC05 02 DEFB $02 ; (FC05) physical number for drive F: FC06 02 DEFB $02 ; (FC06) physical number for drive G: FC07 02 DEFB $02 ; (FC07) physical number for drive H: FC08 FF DEFB $FF FC09 FF DEFB $FF FC0A FF DEFB $FF FC0B FF DEFB $FF FC0C 00 DEFB $00 FC0D 00 DEFB $00 FC0E 00 DEFB $00 FC0F 00 DEFB $00 ; ########## CSV #0 ########### FC10 00 DEFB $00 FC11 00 DEFB $00 FC12 00 DEFB $00 FC13 00 DEFB $00 FC14 00 DEFB $00 FC15 00 DEFB $00 FC16 00 DEFB $00 FC17 00 DEFB $00 FC18 00 DEFB $00 FC19 00 DEFB $00 FC1A 00 DEFB $00 FC1B 00 DEFB $00 FC1C 00 DEFB $00 FC1D 00 DEFB $00 FC1E 00 DEFB $00 FC1F 00 DEFB $00 ; ########## CSV #1 ########### FC20 00 DEFB $00 FC21 00 DEFB $00 FC22 00 DEFB $00 FC23 00 DEFB $00 FC24 00 DEFB $00 FC25 00 DEFB $00 FC26 00 DEFB $00 FC27 00 DEFB $00 FC28 00 DEFB $00 FC29 00 DEFB $00 FC2A 00 DEFB $00 FC2B 00 DEFB $00 FC2C 00 DEFB $00 FC2D 00 DEFB $00 FC2E 00 DEFB $00 FC2F 00 DEFB $00 ; ########## CSV #2 ########### FC30 00 DEFB $00 FC31 00 DEFB $00 FC32 00 DEFB $00 FC33 00 DEFB $00 FC34 00 DEFB $00 FC35 00 DEFB $00 FC36 00 DEFB $00 FC37 00 DEFB $00 FC38 00 DEFB $00 FC39 00 DEFB $00 FC3A 00 DEFB $00 FC3B 00 DEFB $00 FC3C 00 DEFB $00 FC3D 00 DEFB $00 FC3E 00 DEFB $00 FC3F 00 DEFB $00 FC40 00 DEFB $00 FC41 00 DEFB $00 FC42 00 DEFB $00 FC43 00 DEFB $00 FC44 00 DEFB $00 FC45 00 DEFB $00 FC46 00 DEFB $00 FC47 00 DEFB $00 FC48 00 DEFB $00 FC49 00 DEFB $00 FC4A 00 DEFB $00 FC4B 00 DEFB $00 FC4C 00 DEFB $00 FC4D 00 DEFB $00 FC4E 00 DEFB $00 FC4F 00 DEFB $00 ; ########## CSV #3 ########### FC50 00 DEFB $00 FC51 00 DEFB $00 FC52 00 DEFB $00 FC53 00 DEFB $00 FC54 00 DEFB $00 FC55 00 DEFB $00 FC56 00 DEFB $00 FC57 00 DEFB $00 FC58 00 DEFB $00 FC59 00 DEFB $00 FC5A 00 DEFB $00 FC5B 00 DEFB $00 FC5C 00 DEFB $00 FC5D 00 DEFB $00 FC5E 00 DEFB $00 FC5F 00 DEFB $00 FC60 00 DEFB $00 FC61 00 DEFB $00 FC62 00 DEFB $00 FC63 00 DEFB $00 FC64 00 DEFB $00 FC65 00 DEFB $00 FC66 00 DEFB $00 FC67 00 DEFB $00 FC68 00 DEFB $00 FC69 00 DEFB $00 FC6A 00 DEFB $00 FC6B 00 DEFB $00 FC6C 00 DEFB $00 FC6D 00 DEFB $00 FC6E 00 DEFB $00 FC6F 00 DEFB $00 ; ########## CSV #4-#7 ########### FC70 00 DEFB $00 FC71 00 DEFB $00 FC72 00 DEFB $00 FC73 00 DEFB $00 FC74 00 DEFB $00 FC75 00 DEFB $00 FC76 00 DEFB $00 FC77 00 DEFB $00 FC78 00 DEFB $00 FC79 00 DEFB $00 FC7A 00 DEFB $00 FC7B 00 DEFB $00 FC7C 00 DEFB $00 FC7D 00 DEFB $00 FC7E 00 DEFB $00 FC7F 00 DEFB $00 FC80 00 DEFB $00 FC81 00 DEFB $00 FC82 00 DEFB $00 FC83 00 DEFB $00 FC84 00 DEFB $00 FC85 00 DEFB $00 FC86 00 DEFB $00 FC87 00 DEFB $00 FC88 00 DEFB $00 FC89 00 DEFB $00 FC8A 00 DEFB $00 FC8B 00 DEFB $00 FC8C 00 DEFB $00 FC8D 00 DEFB $00 FC8E 00 DEFB $00 FC8F 00 DEFB $00 ; ########## ALV #0 ########### FC90 00 DEFB $00 FC91 00 DEFB $00 FC92 00 DEFB $00 FC93 00 DEFB $00 FC94 00 DEFB $00 FC95 00 DEFB $00 FC96 00 DEFB $00 FC97 00 DEFB $00 FC98 00 DEFB $00 FC99 00 DEFB $00 FC9A 00 DEFB $00 FC9B 00 DEFB $00 FC9C 00 DEFB $00 FC9D 00 DEFB $00 FC9E 00 DEFB $00 FC9F 00 DEFB $00 FCA0 00 DEFB $00 FCA1 00 DEFB $00 FCA2 00 DEFB $00 FCA3 00 DEFB $00 FCA4 00 DEFB $00 FCA5 00 DEFB $00 FCA6 00 DEFB $00 FCA7 00 DEFB $00 FCA8 00 DEFB $00 FCA9 00 DEFB $00 FCAA 00 DEFB $00 FCAB 00 DEFB $00 FCAC 00 DEFB $00 FCAD 00 DEFB $00 FCAE 00 DEFB $00 FCAF 00 DEFB $00 ; ########## ALV #1 ########### FCB0 00 DEFB $00 FCB1 00 DEFB $00 FCB2 00 DEFB $00 FCB3 00 DEFB $00 FCB4 00 DEFB $00 FCB5 00 DEFB $00 FCB6 00 DEFB $00 FCB7 00 DEFB $00 FCB8 00 DEFB $00 FCB9 00 DEFB $00 FCBA 00 DEFB $00 FCBB 00 DEFB $00 FCBC 00 DEFB $00 FCBD 00 DEFB $00 FCBE 00 DEFB $00 FCBF 00 DEFB $00 FCC0 00 DEFB $00 FCC1 00 DEFB $00 FCC2 00 DEFB $00 FCC3 00 DEFB $00 FCC4 00 DEFB $00 FCC5 00 DEFB $00 FCC6 00 DEFB $00 FCC7 00 DEFB $00 FCC8 00 DEFB $00 FCC9 00 DEFB $00 FCCA 00 DEFB $00 FCCB 00 DEFB $00 FCCC 00 DEFB $00 FCCD 00 DEFB $00 FCCE 00 DEFB $00 FCCF 00 DEFB $00 ; ########## ALV #2 ########### FCD0 00 DEFB $00 FCD1 00 DEFB $00 FCD2 00 DEFB $00 FCD3 00 DEFB $00 FCD4 00 DEFB $00 FCD5 00 DEFB $00 FCD6 00 DEFB $00 FCD7 00 DEFB $00 FCD8 00 DEFB $00 FCD9 00 DEFB $00 FCDA 00 DEFB $00 FCDB 00 DEFB $00 FCDC 00 DEFB $00 FCDD 00 DEFB $00 FCDE 00 DEFB $00 FCDF 00 DEFB $00 FCE0 00 DEFB $00 FCE1 00 DEFB $00 FCE2 00 DEFB $00 FCE3 00 DEFB $00 FCE4 00 DEFB $00 FCE5 00 DEFB $00 FCE6 00 DEFB $00 FCE7 00 DEFB $00 FCE8 00 DEFB $00 FCE9 00 DEFB $00 FCEA 00 DEFB $00 FCEB 00 DEFB $00 FCEC 00 DEFB $00 FCED 00 DEFB $00 FCEE 00 DEFB $00 FCEF 00 DEFB $00 FCF0 00 DEFB $00 FCF1 00 DEFB $00 FCF2 00 DEFB $00 FCF3 00 DEFB $00 FCF4 00 DEFB $00 FCF5 00 DEFB $00 FCF6 00 DEFB $00 FCF7 00 DEFB $00 FCF8 00 DEFB $00 FCF9 00 DEFB $00 FCFA 00 DEFB $00 FCFB 00 DEFB $00 FCFC 00 DEFB $00 FCFD 00 DEFB $00 FCFE 00 DEFB $00 FCFF 00 DEFB $00 FD00 00 DEFB $00 FD01 00 DEFB $00 FD02 00 DEFB $00 FD03 00 DEFB $00 FD04 00 DEFB $00 FD05 00 DEFB $00 FD06 00 DEFB $00 FD07 00 DEFB $00 FD08 00 DEFB $00 FD09 00 DEFB $00 FD0A 00 DEFB $00 FD0B 00 DEFB $00 FD0C 00 DEFB $00 FD0D 00 DEFB $00 FD0E 00 DEFB $00 FD0F 00 DEFB $00 ; ########## ALV #3 ########### FD10 00 DEFB $00 FD11 00 DEFB $00 FD12 00 DEFB $00 FD13 00 DEFB $00 FD14 00 DEFB $00 FD15 00 DEFB $00 FD16 00 DEFB $00 FD17 00 DEFB $00 FD18 00 DEFB $00 FD19 00 DEFB $00 FD1A 00 DEFB $00 FD1B 00 DEFB $00 FD1C 00 DEFB $00 FD1D 00 DEFB $00 FD1E 00 DEFB $00 FD1F 00 DEFB $00 FD20 00 DEFB $00 FD21 00 DEFB $00 FD22 00 DEFB $00 FD23 00 DEFB $00 FD24 00 DEFB $00 FD25 00 DEFB $00 FD26 00 DEFB $00 FD27 00 DEFB $00 FD28 00 DEFB $00 FD29 00 DEFB $00 FD2A 00 DEFB $00 FD2B 00 DEFB $00 FD2C 00 DEFB $00 FD2D 00 DEFB $00 FD2E 00 DEFB $00 FD2F 00 DEFB $00 FD30 00 DEFB $00 FD31 00 DEFB $00 FD32 00 DEFB $00 FD33 00 DEFB $00 FD34 00 DEFB $00 FD35 00 DEFB $00 FD36 00 DEFB $00 FD37 00 DEFB $00 FD38 00 DEFB $00 FD39 00 DEFB $00 FD3A 00 DEFB $00 FD3B 00 DEFB $00 FD3C 00 DEFB $00 FD3D 00 DEFB $00 FD3E 00 DEFB $00 FD3F 00 DEFB $00 FD40 00 DEFB $00 FD41 00 DEFB $00 FD42 00 DEFB $00 FD43 00 DEFB $00 FD44 00 DEFB $00 FD45 00 DEFB $00 FD46 00 DEFB $00 FD47 00 DEFB $00 FD48 00 DEFB $00 FD49 00 DEFB $00 FD4A 00 DEFB $00 FD4B 00 DEFB $00 FD4C 00 DEFB $00 FD4D 00 DEFB $00 FD4E 00 DEFB $00 FD4F 00 DEFB $00 ; ########## ALV #4-#7 ########### FD50 00 DEFB $00 FD51 00 DEFB $00 FD52 00 DEFB $00 FD53 00 DEFB $00 FD54 00 DEFB $00 FD55 00 DEFB $00 FD56 00 DEFB $00 FD57 00 DEFB $00 FD58 00 DEFB $00 FD59 00 DEFB $00 FD5A 00 DEFB $00 FD5B 00 DEFB $00 FD5C 00 DEFB $00 FD5D 00 DEFB $00 FD5E 00 DEFB $00 FD5F 00 DEFB $00 FD60 00 DEFB $00 FD61 00 DEFB $00 FD62 00 DEFB $00 FD63 00 DEFB $00 FD64 00 DEFB $00 FD65 00 DEFB $00 FD66 00 DEFB $00 FD67 00 DEFB $00 FD68 00 DEFB $00 FD69 00 DEFB $00 FD6A 00 DEFB $00 FD6B 00 DEFB $00 FD6C 00 DEFB $00 FD6D 00 DEFB $00 FD6E 00 DEFB $00 FD6F 00 DEFB $00 FD70 00 DEFB $00 FD71 00 DEFB $00 FD72 00 DEFB $00 FD73 00 DEFB $00 FD74 00 DEFB $00 FD75 00 DEFB $00 FD76 00 DEFB $00 FD77 00 DEFB $00 FD78 00 DEFB $00 FD79 00 DEFB $00 FD7A 00 DEFB $00 FD7B 00 DEFB $00 FD7C 00 DEFB $00 FD7D 00 DEFB $00 FD7E 00 DEFB $00 FD7F 00 DEFB $00 FD80 00 DEFB $00 FD81 00 DEFB $00 FD82 00 DEFB $00 FD83 00 DEFB $00 FD84 00 DEFB $00 FD85 00 DEFB $00 FD86 00 DEFB $00 FD87 00 DEFB $00 FD88 00 DEFB $00 FD89 00 DEFB $00 FD8A 00 DEFB $00 FD8B 00 DEFB $00 FD8C 00 DEFB $00 FD8D 00 DEFB $00 FD8E 00 DEFB $00 FD8F 00 DEFB $00 ; ############### Backup CTC interrupt table (FD90) ############### FD90 A3 DEFB $A3 ; int. vector for CTC-0 FD91 E2 DEFB $E2 ; (E2A3) FD92 A3 DEFB $A3 ; int. vector for CTC-1 FD93 E2 DEFB $E2 ; (E2A3) FD94 A3 DEFB $A3 ; int. vector for CTC-2 FD95 E2 DEFB $E2 ; (E2A3) FD96 DB DEFB $DB ; int. vector for CTC-3 FD97 E1 DEFB $E1 ; (E1DB) ; ############### CTC interrupt table (FD98) ############### FD98 A3 DEFB $A3 ; int. vector for CTC-0 FD99 E2 DEFB $E2 ; (E2A3) FD9A A3 DEFB $A3 ; int. vector for CTC-1 FD9B E2 DEFB $E2 ; (E2A3) FD9C A3 DEFB $A3 ; int. vector for CTC-2 FD9D E2 DEFB $E2 ; (E2A3) FD9E 24 DEFB $24 ; int. vector for CTC-3 FD9F E2 DEFB $E2 ; (E224) FDA0 00 DEFB $00 FDA1 00 DEFB $00 FDA2 00 DEFB $00 FDA3 00 DEFB $00 FDA4 00 DEFB $00 FDA5 00 DEFB $00 FDA6 00 DEFB $00 FDA7 00 DEFB $00 FDA8 00 DEFB $00 FDA9 00 DEFB $00 FDAA 00 DEFB $00 FDAB 00 DEFB $00 FDAC 00 DEFB $00 FDAD 00 DEFB $00 FDAE 00 DEFB $00 FDAF 00 DEFB $00 FDB0 00 DEFB $00 FDB1 00 DEFB $00 FDB2 00 DEFB $00 FDB3 00 DEFB $00 FDB4 00 DEFB $00 FDB5 00 DEFB $00 FDB6 00 DEFB $00 FDB7 00 DEFB $00 FDB8 00 DEFB $00 FDB9 00 DEFB $00 FDBA 00 DEFB $00 FDBB 00 DEFB $00 FDBC 00 DEFB $00 FDBD 00 DEFB $00 FDBE 00 DEFB $00 FDBF 00 DEFB $00 FDC0 85 DEFB $85 FDC1 E2 DEFB $E2 FDC2 85 DEFB $85 FDC3 E2 DEFB $E2 FDC4 85 DEFB $85 FDC5 E2 DEFB $E2 FDC6 00 DEFB $00 FDC7 00 DEFB $00 FDC8 00 DEFB $00 FDC9 00 DEFB $00 FDCA 00 DEFB $00 ; /\ alternate FDCB 00 DEFB $00 ; /\ stack FDCC 00 DEFB $00 ; /\ location FDCD 00 DEFB $00 ; ************** FDCE 00 DEFB $00 ; (FDCE) \ backup for SP FDCF 00 DEFB $00 ; (FDCF) / (Stack Pointer) FDD0 00 DEFB $00 FDD1 00 DEFB $00 FDD2 00 DEFB $00 FDD3 00 DEFB $00 FDD4 00 DEFB $00 FDD5 00 DEFB $00 FDD6 00 DEFB $00 FDD7 00 DEFB $00 FDD8 00 DEFB $00 FDD9 00 DEFB $00 FDDA 00 DEFB $00 FDDB 00 DEFB $00 FDDC 00 DEFB $00 FDDD 00 DEFB $00 FDDE 00 DEFB $00 FDDF 00 DEFB $00 FDE0 00 DEFB $00 FDE1 00 DEFB $00 FDE2 00 DEFB $00 FDE3 00 DEFB $00 FDE4 00 DEFB $00 FDE5 00 DEFB $00 FDE6 00 DEFB $00 FDE7 00 DEFB $00 FDE8 00 DEFB $00 FDE9 00 DEFB $00 FDEA 00 DEFB $00 FDEB 00 DEFB $00 FDEC 00 DEFB $00 FDED 00 DEFB $00 FDEE 00 DEFB $00 FDEF 00 DEFB $00 ; ##### 8272 command result bytes FDF0 00 DEFB $00 ; ST0 FDF1 00 DEFB $00 ; ST1 FDF2 00 DEFB $00 ; ST2 FDF3 00 DEFB $00 ; C FDF4 00 DEFB $00 ; H FDF5 00 DEFB $00 ; R FDF6 00 DEFB $00 ; N FDF7 00 DEFB $00 ; ##### 8272 command args FDF8 00 DEFB $00 ; head+drive FDF9 00 DEFB $00 ; C | N FDFA 00 DEFB $00 ; H | SC FDFB 00 DEFB $00 ; R | GPL FDFC 00 DEFB $00 ; N | D FDFD 00 DEFB $00 ; EOT FDFE 00 DEFB $00 ; GPL FDFF 00 DEFB $00 ; DTL | STP